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Re: [Qemu-trivial] [Qemu-devel] [PATCH trivial] Fix debug print warning


From: Gonglei
Subject: Re: [Qemu-trivial] [Qemu-devel] [PATCH trivial] Fix debug print warning
Date: Sat, 23 Aug 2014 12:49:30 +0800

> Subject: Re: [Qemu-devel] [PATCH trivial] Fix debug print warning
> 
> On Fri, Aug 22, 2014 at 1:38 PM,  <address@hidden> wrote:
> > From: Gonglei <address@hidden>
> >
> > Steps:
> >
> > 1.enable qemu debug print, using simply scprit as below:
> >  grep "//#define DEBUG" * -rl | xargs sed -i "s/\/\/#define DEBUG/#define
> DEBUG/g"
> > 2. make -j
> > 3. get some warning:
> > hw/i2c/pm_smbus.c: In function 'smb_ioport_writeb':
> > hw/i2c/pm_smbus.c:142: warning: format '%04x' expects type 'unsigned int',
> but argument 2 has type 'hwaddr'
> > hw/i2c/pm_smbus.c:142: warning: format '%02x' expects type 'unsigned int',
> but argument 3 has type 'uint64_t'
> > hw/i2c/pm_smbus.c: In function 'smb_ioport_readb':
> > hw/i2c/pm_smbus.c:209: warning: format '%04x' expects type 'unsigned int',
> but argument 2 has type 'hwaddr'
> > hw/intc/i8259.c: In function 'pic_ioport_read':
> > hw/intc/i8259.c:373: warning: format '%02x' expects type 'unsigned int', but
> argument 2 has type 'hwaddr'
> > hw/input/pckbd.c: In function 'kbd_write_command':
> > hw/input/pckbd.c:232: warning: format '%02x' expects type 'unsigned int',
> but argument 2 has type 'uint64_t'
> > hw/input/pckbd.c: In function 'kbd_write_data':
> > hw/input/pckbd.c:333: warning: format '%02x' expects type 'unsigned int',
> but argument 2 has type 'uint64_t'
> > hw/isa/apm.c: In function 'apm_ioport_writeb':
> > hw/isa/apm.c:44: warning: format '%x' expects type 'unsigned int', but
> argument 2 has type 'hwaddr'
> > hw/isa/apm.c:44: warning: format '%02x' expects type 'unsigned int', but
> argument 3 has type 'uint64_t'
> > hw/isa/apm.c: In function 'apm_ioport_readb':
> > hw/isa/apm.c:67: warning: format '%x' expects type 'unsigned int', but
> argument 2 has type 'hwaddr'
> > hw/timer/mc146818rtc.c: In function 'cmos_ioport_write':
> > hw/timer/mc146818rtc.c:394: warning: format '%02x' expects type 'unsigned
> int', but argument 3 has type 'uint64_t'
> > hw/i386/pc.c: In function 'port92_write':
> > hw/i386/pc.c:479: warning: format '%02x' expects type 'unsigned int', but
> argument 2 has type 'uint64_t'
> >
> > Fix them.
> >
> > Cc: address@hidden
> > Signed-off-by: Gonglei <address@hidden>
> > ---
> >  BTW,
> >  I have posted three patches for some module which broke QEMU compling
> in the same way.
> >  [PATCH v2] scsi-generic: remove superfluous DPRINTF avoid to break
> compiling
> >  [PATCH v2] monitor: fix debug print compiling error
> >  [PATCH] xhci: fix debug print compiling error
> >
> > And I think this one and above "monitor.." can be included in trivial 
> > branch.
> > Thanks.
> > ---
> >  hw/i2c/pm_smbus.c      | 5 +++--
> >  hw/i386/pc.c           | 2 +-
> >  hw/input/pckbd.c       | 4 ++--
> >  hw/intc/i8259.c        | 2 +-
> >  hw/isa/apm.c           | 5 +++--
> >  hw/timer/mc146818rtc.c | 2 +-
> >  6 files changed, 11 insertions(+), 9 deletions(-)
> >
> > diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c
> > index fedb5fb..98eb71f 100644
> > --- a/hw/i2c/pm_smbus.c
> > +++ b/hw/i2c/pm_smbus.c
> > @@ -139,7 +139,8 @@ static void smb_ioport_writeb(void *opaque, hwaddr
> addr, uint64_t val,
> >  {
> >      PMSMBus *s = opaque;
> >
> > -    SMBUS_DPRINTF("SMB writeb port=0x%04x val=0x%02x\n", addr, val);
> > +    SMBUS_DPRINTF("SMB writeb port=0x%04" PRIx64
> > +                  " val=0x%02" PRIx64 "\n", addr, val);
> 
> HWADDR_PRI here and below.
> 
Got it. Thanks! Peter.

Best regards,
-Gonglei

> Regards,
> Peter
> 
> >      switch(addr) {
> >      case SMBHSTSTS:
> >          s->smb_stat = (~(val & 0xff)) & s->smb_stat;
> > @@ -206,7 +207,7 @@ static uint64_t smb_ioport_readb(void *opaque,
> hwaddr addr, unsigned width)
> >          val = 0;
> >          break;
> >      }
> > -    SMBUS_DPRINTF("SMB readb port=0x%04x val=0x%02x\n", addr, val);
> > +    SMBUS_DPRINTF("SMB readb port=0x%04" PRIx64 " val=0x%02x\n",
> addr, val);
> >      return val;
> >  }
> >
> > diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> > index 8fa8d2f..0b1ab1f 100644
> > --- a/hw/i386/pc.c
> > +++ b/hw/i386/pc.c
> > @@ -476,7 +476,7 @@ static void port92_write(void *opaque, hwaddr addr,
> uint64_t val,
> >      Port92State *s = opaque;
> >      int oldval = s->outport;
> >
> > -    DPRINTF("port92: write 0x%02x\n", val);
> > +    DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
> >      s->outport = val;
> >      qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> >      if ((val & 1) && !(oldval & 1)) {
> > diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c
> > index ca1cffc..2ab8c87 100644
> > --- a/hw/input/pckbd.c
> > +++ b/hw/input/pckbd.c
> > @@ -229,7 +229,7 @@ static void kbd_write_command(void *opaque,
> hwaddr addr,
> >  {
> >      KBDState *s = opaque;
> >
> > -    DPRINTF("kbd: write cmd=0x%02x\n", val);
> > +    DPRINTF("kbd: write cmd=0x%02" PRIx64 "\n", val);
> >
> >      /* Bits 3-0 of the output port P2 of the keyboard controller may be
> pulsed
> >       * low for approximately 6 micro seconds. Bits 3-0 of the
> KBD_CCMD_PULSE
> > @@ -330,7 +330,7 @@ static void kbd_write_data(void *opaque, hwaddr
> addr,
> >  {
> >      KBDState *s = opaque;
> >
> > -    DPRINTF("kbd: write data=0x%02x\n", val);
> > +    DPRINTF("kbd: write data=0x%02" PRIx64 "\n", val);
> >
> >      switch(s->write_cmd) {
> >      case 0:
> > diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c
> > index a563b82..3a62e33 100644
> > --- a/hw/intc/i8259.c
> > +++ b/hw/intc/i8259.c
> > @@ -370,7 +370,7 @@ static uint64_t pic_ioport_read(void *opaque,
> hwaddr addr,
> >              ret = s->imr;
> >          }
> >      }
> > -    DPRINTF("read: addr=0x%02x val=0x%02x\n", addr, ret);
> > +    DPRINTF("read: addr=0x%02" PRIx64 " val=0x%02x\n", addr, ret);
> >      return ret;
> >  }
> >
> > diff --git a/hw/isa/apm.c b/hw/isa/apm.c
> > index 054d529..8f60cb0 100644
> > --- a/hw/isa/apm.c
> > +++ b/hw/isa/apm.c
> > @@ -41,7 +41,8 @@ static void apm_ioport_writeb(void *opaque, hwaddr
> addr, uint64_t val,
> >  {
> >      APMState *apm = opaque;
> >      addr &= 1;
> > -    APM_DPRINTF("apm_ioport_writeb addr=0x%x val=0x%02x\n", addr,
> val);
> > +    APM_DPRINTF("apm_ioport_writeb addr=0x%" PRIx64
> > +                " val=0x%02" PRIx64 "\n", addr, val);
> >      if (addr == 0) {
> >          apm->apmc = val;
> >
> > @@ -64,7 +65,7 @@ static uint64_t apm_ioport_readb(void *opaque,
> hwaddr addr, unsigned size)
> >      } else {
> >          val = apm->apms;
> >      }
> > -    APM_DPRINTF("apm_ioport_readb addr=0x%x val=0x%02x\n", addr,
> val);
> > +    APM_DPRINTF("apm_ioport_readb addr=0x%" PRIx64 " val=0x%02x\n",
> addr, val);
> >      return val;
> >  }
> >
> > diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
> > index 233fc70..340dd92 100644
> > --- a/hw/timer/mc146818rtc.c
> > +++ b/hw/timer/mc146818rtc.c
> > @@ -391,7 +391,7 @@ static void cmos_ioport_write(void *opaque, hwaddr
> addr,
> >      if ((addr & 1) == 0) {
> >          s->cmos_index = data & 0x7f;
> >      } else {
> > -        CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02x\n",
> > +        CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02" PRIx64
> "\n",
> >                       s->cmos_index, data);
> >          switch(s->cmos_index) {
> >          case RTC_SECONDS_ALARM:
> > --
> > 1.7.12.4
> >
> >
> >





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