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Re: [Qemu-trivial] [PATCH 18/34] hw/unicore32: restrict hw addr defines


From: Thomas Huth
Subject: Re: [Qemu-trivial] [PATCH 18/34] hw/unicore32: restrict hw addr defines to source file
Date: Mon, 25 Sep 2017 07:19:34 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0

On 22.09.2017 17:39, Philippe Mathieu-Daudé wrote:
> and drop unused #includes
> 
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
> ---
>  include/hw/unicore32/puv3.h | 10 ----------
>  hw/unicore32/puv3.c         | 16 ++++++++++------
>  2 files changed, 10 insertions(+), 16 deletions(-)
> 
> diff --git a/include/hw/unicore32/puv3.h b/include/hw/unicore32/puv3.h
> index 5a4839f8df..f587a1f622 100644
> --- a/include/hw/unicore32/puv3.h
> +++ b/include/hw/unicore32/puv3.h
> @@ -14,16 +14,6 @@
>  
>  #define PUV3_REGS_OFFSET        (0x1000) /* 4K is reasonable */
>  
> -/* PKUnity System bus (AHB): 0xc0000000 - 0xedffffff (640MB) */
> -#define PUV3_DMA_BASE           (0xc0200000) /* AHB-4 */
> -
> -/* PKUnity Peripheral bus (APB): 0xee000000 - 0xefffffff (128MB) */
> -#define PUV3_GPIO_BASE          (0xee500000) /* APB-5 */
> -#define PUV3_INTC_BASE          (0xee600000) /* APB-6 */
> -#define PUV3_OST_BASE           (0xee800000) /* APB-8 */
> -#define PUV3_PM_BASE            (0xeea00000) /* APB-10 */
> -#define PUV3_PS2_BASE           (0xeeb00000) /* APB-11 */
> -
>  /* Hardware interrupts */
>  #define PUV3_IRQS_NR            (32)
>  
> diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c
> index 504ea46211..6849bac59c 100644
> --- a/hw/unicore32/puv3.c
> +++ b/hw/unicore32/puv3.c
> @@ -11,16 +11,10 @@
>  
>  #include "qemu/osdep.h"
>  #include "qapi/error.h"
> -#include "qemu-common.h"
>  #include "cpu.h"
>  #include "ui/console.h"
> -#include "elf.h"
> -#include "exec/address-spaces.h"
> -#include "hw/sysbus.h"
>  #include "hw/boards.h"
>  #include "hw/loader.h"
> -#include "hw/i386/pc.h"
> -#include "qemu/error-report.h"
>  #include "sysemu/qtest.h"
>  
>  #undef DEBUG_PUV3
> @@ -29,6 +23,16 @@
>  #define KERNEL_LOAD_ADDR        0x03000000
>  #define KERNEL_MAX_SIZE         0x00800000 /* Just a guess */
>  
> +/* PKUnity System bus (AHB): 0xc0000000 - 0xedffffff (640MB) */
> +#define PUV3_DMA_BASE           (0xc0200000) /* AHB-4 */
> +
> +/* PKUnity Peripheral bus (APB): 0xee000000 - 0xefffffff (128MB) */
> +#define PUV3_GPIO_BASE          (0xee500000) /* APB-5 */
> +#define PUV3_INTC_BASE          (0xee600000) /* APB-6 */
> +#define PUV3_OST_BASE           (0xee800000) /* APB-8 */
> +#define PUV3_PM_BASE            (0xeea00000) /* APB-10 */
> +#define PUV3_PS2_BASE           (0xeeb00000) /* APB-11 */
> +
>  static void puv3_intc_cpu_handler(void *opaque, int irq, int level)
>  {
>      UniCore32CPU *cpu = opaque;
> 

Reviewed-by: Thomas Huth <address@hidden>




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