Re: [RFC PATCH 2/2] hw/arm/raspi: Restrict BCM2835 / BCM2836 SoC to TCG

[Philippe Mathieu-Daudé]

+Igor (qom) / Eduardo (qdev) / Paolo (accel)

On 2/1/21 9:18 AM, Luc Michel wrote:
> Hi Philippe,
> 
> On 16:14 Sun 31 Jan     , Philippe Mathieu-Daudé wrote:
>> KVM requires the target cpu to be at least ARMv8 architecture
>> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
>> "target/arm: Remove KVM support for 32-bit Arm hosts").
> Wow, is there absolutely no way to do that then? What about using an
> ARMv8 and starting in AArch32 mode? Is that possible with KVM? I guess
> it might not be strictly identical as spawning the "real" CPU...

This is what Peter said here:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg777669.html

  "KVM requires the target CPU to be at least ARMv8, because
  we only support the "host" cpu type, and all KVM host CPUs
  are v8, which means you can't pass a v7 CPU as the target CPU.
  (This used to not be true when we still supported running
  KVM on a v7 CPU like the Cortex-A15, in which case you could
  pass it to the guest.)"

> 
>>
>> From the various SoC used by the Raspberry Pi machines, only
>> the BCM2837 is an ARMv8 (Cortex-A53).
>>
>> Restrict the BCM2835 (ARM1176) and BCM2836 (Cortex-A7) to TCG.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>  hw/arm/bcm2836.c | 6 ++++++
>>  hw/arm/raspi.c   | 4 ++++
>>  2 files changed, 10 insertions(+)
>>
>> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
>> index fd16ed87c40..3051764f2dc 100644
>> --- a/hw/arm/bcm2836.c
>> +++ b/hw/arm/bcm2836.c
>> @@ -89,6 +89,7 @@ static bool bcm283x_common_realize(DeviceState *dev, Error 
>> **errp)
>>      return true;
>>  }
>>  
>> +#ifdef CONFIG_TCG
> I'm not sure it's enough. TCG and KVM can be enabled in the same
> binary. You'll have to perform a runtime check here I think.

If TCG is enabled, all SoC are built in (regardless of KVM enabled).
If only KVM is enabled, the TCG part is not built in (only ARMv8
based SoC left).

The problem is when QOM types are registered, we can not know
yet if the accelerator is enabled, because accelerators are also
QOM types and are realized later. So at this point runtime check
is not possible. See this post:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg777761.html

> 
>>  static void bcm2835_realize(DeviceState *dev, Error **errp)
>>  {
>>      BCM283XState *s = BCM283X(dev);
>> @@ -107,6 +108,7 @@ static void bcm2835_realize(DeviceState *dev, Error 
>> **errp)
>>      sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
>>              qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_FIQ));
>>  }
>> +#endif /* CONFIG_TCG */
...