Re: [Simulavr-devel] Whats to do on execution of "illegal instruction"

[Thomas K]

Hi Jörg,

does anybody know, what's happen, if a real controller get a invalid 
opcode? As the SBRS code in case of FF FF suggest sould this mean, that 
the decoding logic in avr isn't complete so that nobody knows, which bit 
- that's for example described as 0 or 1 - in reality is interpreted as 
X. Right?

I remember the Z80 days. It had also some undocumented opcodes. And some 
are sometimes used. Like now for FF FF in avr. On Z80 it was easy to get 
a single step mode. I think here it's only possible with JTAG debugging.

To answer Klaus question - my proposal in this case would be: (like 
Albrecht suggest) let the behaviour (abort as now or maybe breakpoint in 
case of invalid opcode and emit a error message) as it is but with a 
commandline option, that change the behaviour for FF FF to NOP (or maybe 
the SBRS action) WITHOUT any message.

Maybe: "--invalid-opcode=(ffnop|break|abort)"

ffnop - FF FF interpreted as NOP without any message
break - behaviour like breakpoint with message
abort - (the default) abort simulation with a message

cu, Thomas