Re: [Tinycc-devel] lcall invalid hex code

[Sergey Korshunoff]

> You realize that you can't simply copy&paste random bytes around without 
> understanding the
> instruction encoding, right?  You took one specific instruction with its 
> specific operands and
> made that the "encoding" of all instructions with that mnemonic irrespective 
> of operands.

Yes, a patch was incorrect. A  patch for the next asm code bug:

fix the "bug #39341: TCC emits wrong opcode for XCHG"
....
    #include <stdio.h>
    int main() {
        int i = 0x16789;
        printf("Number:   %x\n", i);
        __asm__ __volatile__ ("xchg %%ah, %%al;" : "=a" (i) : "0" (i));
        printf("Reversed: %x\n", i);
    }
    // The asm instruction is 0x94 which is xchg %eax,%esp (according to objdump
    // and ollydbg). This leads to an immediate segfault!
    // The correct opcode would be 0x86 0xE0..

    A bug description: a byte code ops must be declared _before_
    a word codes in i386-asm.h and x86_64-asm.h

diff --git a/i386-asm.h b/i386-asm.h
index 637568b..677519c 100644
--- a/i386-asm.h
+++ b/i386-asm.h
@@ -135,10 +135,10 @@ ALT(DEF_ASM_OP1(popw, 0x58, 0, OPC_REG | OPC_WL,
OPT_REGW))
 ALT(DEF_ASM_OP1(popw, 0x8f, 0, OPC_MODRM | OPC_WL, OPT_REGW | OPT_EA))
 ALT(DEF_ASM_OP1(popw, 0x07, 0, OPC_WL, OPT_SEG))
.
-ALT(DEF_ASM_OP2(xchgw, 0x90, 0, OPC_REG | OPC_WL, OPT_REG, OPT_EAX))
-ALT(DEF_ASM_OP2(xchgw, 0x90, 0, OPC_REG | OPC_WL, OPT_EAX, OPT_REG))
 ALT(DEF_ASM_OP2(xchgb, 0x86, 0, OPC_MODRM | OPC_BWL, OPT_REG, OPT_EA
| OPT_REG))
 ALT(DEF_ASM_OP2(xchgb, 0x86, 0, OPC_MODRM | OPC_BWL, OPT_EA |
OPT_REG, OPT_REG))
+ALT(DEF_ASM_OP2(xchgw, 0x90, 0, OPC_REG | OPC_WL, OPT_REG, OPT_EAX))
+ALT(DEF_ASM_OP2(xchgw, 0x90, 0, OPC_REG | OPC_WL, OPT_EAX, OPT_REG))
.
 ALT(DEF_ASM_OP2(inb, 0xe4, 0, OPC_BWL, OPT_IM8, OPT_EAX))
 ALT(DEF_ASM_OP1(inb, 0xe4, 0, OPC_BWL, OPT_IM8))
diff --git a/x86_64-asm.h b/x86_64-asm.h
index df76bf0..9b01a02 100644
--- a/x86_64-asm.h
+++ b/x86_64-asm.h
@@ -124,10 +124,10 @@ ALT(DEF_ASM_OP1(popw, 0x58, 0, OPC_REG |
OPC_WLQ, OPT_REGW))
 ALT(DEF_ASM_OP1(popw, 0x8f, 0, OPC_MODRM | OPC_WLQ, OPT_REGW | OPT_EA))
 ALT(DEF_ASM_OP1(popw, 0x07, 0, OPC_WLQ, OPT_SEG))

-ALT(DEF_ASM_OP2(xchgw, 0x90, 0, OPC_REG | OPC_WLQ, OPT_REG, OPT_EAX))
-ALT(DEF_ASM_OP2(xchgw, 0x90, 0, OPC_REG | OPC_WLQ, OPT_EAX, OPT_REG))
 ALT(DEF_ASM_OP2(xchgb, 0x86, 0, OPC_MODRM | OPC_BWLQ, OPT_REG, OPT_EA
| OPT_REG))
 ALT(DEF_ASM_OP2(xchgb, 0x86, 0, OPC_MODRM | OPC_BWLQ, OPT_EA |
OPT_REG, OPT_REG))
+ALT(DEF_ASM_OP2(xchgw, 0x90, 0, OPC_REG | OPC_WLQ, OPT_REG, OPT_EAX))
+ALT(DEF_ASM_OP2(xchgw, 0x90, 0, OPC_REG | OPC_WLQ, OPT_EAX, OPT_REG))

 ALT(DEF_ASM_OP2(inb, 0xe4, 0, OPC_BWL, OPT_IM8, OPT_EAX))
 ALT(DEF_ASM_OP1(inb, 0xe4, 0, OPC_BWL, OPT_IM8))

PS:
> The mod/rm byte was simply missing from the encoding.  I've corrected this in 
> mob.
can you post a diff? I don't see any patch in the [mob]