[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Tinycc-devel] TCC and ARM instruction set
From: |
KHMan |
Subject: |
Re: [Tinycc-devel] TCC and ARM instruction set |
Date: |
Thu, 26 Apr 2018 23:20:17 +0800 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 |
On 4/26/2018 10:31 PM, Ulrich Althöfer wrote:
Dear Developers,
I am interested to hear more about the state of implementing the
ARM instruction set.
- Are there different levels of developing states between the 16
bit (Thumb) and 32 bit instruction set?
- Is there a hardware abstraction level (HAL) built in the Tiny C
Compiler?
- Are there documents about this subject?
See this intro: https://en.wikipedia.org/wiki/ARM_Cortex-M
It's like the IA32/x64 instruction set these days, there are a lot
of different sets of instructions and this and that. What do you
want to target? That is the question. All? Then the problem is
complexity and scope.
If you want to target IoT parts, say they use Cortex-M4F, then you
need to support a bunch of stuff. Supporting a newer arch will
require supporting other stuff. You kinda need a arch
infrastructure to keep track of all these things. SAM parts all
say Cortex-M0+ in their datasheets (that I've read anyway), but
M0+ is only for the traditional small MCUs.
Anyway, for a C user like me who rarely dip into assembly, it's
hard to keep track of all this proficiently. Successful chip
architectures with lots of legacy baggage need a bit of effort to
learn.
- How expensive is it to implement the Thumb code?
Projects such as tcc are resource-starved. I'm a lurker, I code
other stuff, but I'm sure coders are welcome here. There are no
troops to rally. It's more roll up your sleeves and dig in.
- Isn't it a challenge to implement the 'tiny' Thumb instruction
set, because ARM is the overwhelming dominant embedded processor
architecture nowadays?
Not all embedded users need Thumb instructions. The ARM arch has
different 'modes' targeted towards different market segments.
If you want to be on the leading edge of something, why not do
RISC-V instead?
I am glad to hear about the intentions of implementing.
Greetings from Germany
Ulrich
--
Cheers,
Kein-Hong Man (esq.)
Selangor, Malaysia