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[Tinycc-devel] [PATCH 2/8] arm-asm: Add cdp2
From: |
Danny Milosavljevic |
Subject: |
[Tinycc-devel] [PATCH 2/8] arm-asm: Add cdp2 |
Date: |
Thu, 14 Jan 2021 23:22:21 +0100 |
Also allow instructions without condition code in the first place
---
arm-asm.c | 20 +++++++++++++++-----
arm-tok.h | 4 ++++
tests/arm-asm-testsuite.sh | 3 ++-
3 files changed, 21 insertions(+), 6 deletions(-)
diff --git a/arm-asm.c b/arm-asm.c
index b7f17e2..54947e6 100644
--- a/arm-asm.c
+++ b/arm-asm.c
@@ -155,7 +155,7 @@ ST_FUNC void gen_expr32(ExprValue *pe)
static uint32_t condition_code_of_token(int token) {
if (token < TOK_ASM_nopeq) {
- expect("instruction");
+ expect("condition-enabled instruction");
return 0;
} else
return (token - TOK_ASM_nopeq) & 15;
@@ -335,6 +335,7 @@ static void asm_coprocessor_opcode(TCCState *s1, int token)
{
Operand opcode2;
uint8_t registers[3];
unsigned int i;
+ uint8_t high_nibble;
if (tok >= TOK_ASM_p0 && tok <= TOK_ASM_p15) {
coprocessor = tok - TOK_ASM_p0;
@@ -380,7 +381,11 @@ static void asm_coprocessor_opcode(TCCState *s1, int
token) {
return;
}
- asm_emit_coprocessor_opcode(condition_code_of_token(token), coprocessor,
opcode1.e.v, registers[0], registers[1], registers[2], opcode2.e.v, 0);
+ if (token == TOK_ASM_cdp2)
+ high_nibble = 0xF;
+ else
+ high_nibble = condition_code_of_token(token);
+ asm_emit_coprocessor_opcode(high_nibble, coprocessor, opcode1.e.v,
registers[0], registers[1], registers[2], opcode2.e.v, 0);
}
/* data processing and single data transfer instructions only */
@@ -1425,9 +1430,14 @@ ST_FUNC void asm_opcode(TCCState *s1, int token)
}
if (token == TOK_EOF)
return;
- if (token < TOK_ASM_nopeq) {
- expect("instruction");
- return;
+ if (token < TOK_ASM_nopeq) { // no condition code
+ switch (token) {
+ case TOK_ASM_cdp2:
+ return asm_coprocessor_opcode(s1, token);
+ default:
+ expect("instruction");
+ return;
+ }
}
switch (ARM_INSTRUCTION_GROUP(token)) {
diff --git a/arm-tok.h b/arm-tok.h
index f6cad27..269c4a7 100644
--- a/arm-tok.h
+++ b/arm-tok.h
@@ -70,6 +70,10 @@
DEF_ASM(asl)
+ /* instructions that have no condition code */
+
+ DEF_ASM(cdp2)
+
#define ARM_INSTRUCTION_GROUP(tok) ((((tok) - TOK_ASM_nopeq) & 0xFFFFFFF0) +
TOK_ASM_nopeq)
/* Note: condition code is 4 bits */
diff --git a/tests/arm-asm-testsuite.sh b/tests/arm-asm-testsuite.sh
index f3c06c0..0ea12e1 100755
--- a/tests/arm-asm-testsuite.sh
+++ b/tests/arm-asm-testsuite.sh
@@ -5,7 +5,7 @@ set -e
# Note: "{r3}" is definitely different--but would complicate the assembler.
state="`mktemp -d`"
-cat ../arm-tok.h |grep DEF_ASM_CONDED |grep -v '#define' |grep -v '/[*]' |sed
-e 's;DEF_ASM_CONDED.\(.*\).$;\1;'| grep -v 'not useful' | while read s
+cat ../arm-tok.h |grep DEF_ASM |grep -v 'not useful' |grep -v '#define' |grep
-v '/[*]' |sed -e 's;^[ ]*DEF_ASM[^(]*(\(.*\)).*$;\1;' | egrep -v
'^((r|c|p)[0-9]+|fp|ip|sp|lr|pc|asl)$' | while read s
do
ok=0
for args in "r3, r4, r5, r6" \
@@ -88,6 +88,7 @@ do
"r4, #0xFFFFFF00" \
"r2, #-4" \
"p10, #7, c2, c0, c1, #4" \
+ "p10, #7, r2, c0, c1, #4" \
"#4" \
"#-4" \
""
- [Tinycc-devel] [PATCH 0/8] Implement ARM VFP in ARM inline assembler, Danny Milosavljevic, 2021/01/14
- [Tinycc-devel] [PATCH 4/8] arm-asm: Add ldc, ldcl, stc, stcl, Danny Milosavljevic, 2021/01/14
- [Tinycc-devel] [PATCH 1/8] arm-asm: Add cdp, Danny Milosavljevic, 2021/01/14
- [Tinycc-devel] [PATCH 3/8] arm-asm: Add mcr, mrc, Danny Milosavljevic, 2021/01/14
- [Tinycc-devel] [PATCH 5/8] arm-asm: Add ldc2, ldc2l, stc2, stc2l, Danny Milosavljevic, 2021/01/14
- [Tinycc-devel] [PATCH 8/8] arm-asm: Add vneg, vabs, vsqrt, vcmp, vcmpe, Danny Milosavljevic, 2021/01/14
- [Tinycc-devel] [PATCH 2/8] arm-asm: Add cdp2,
Danny Milosavljevic <=
- [Tinycc-devel] [PATCH 7/8] arm-asm: Add vmla, vmls, vnmls, vnmla, vmul, vnmul, vadd, vsub, vdiv, Danny Milosavljevic, 2021/01/14
- [Tinycc-devel] [PATCH 6/8] arm-asm: Add vldr, vstr., Danny Milosavljevic, 2021/01/14
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