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[Tinycc-devel] TCC riscv32 port - Deferring code generation on external


From: Sam Ellicott
Subject: [Tinycc-devel] TCC riscv32 port - Deferring code generation on external symbol
Date: Sat, 16 Apr 2022 01:03:59 -0400

Hi All,
I have been working on porting tcc to generate code for riscv32
targets and have run into an issue when writing the assembler in the
case of an externally defined symbol. Since the symbol will not be
defined until link time I need to defer the code generation to the
linking step. However, I haven't been able to ascertain 1) what to
check for in a symbol that lets me know that I do not have enough
information for code generation (VT_EXTERN flag?), 2) how to let the
linker know where and what code it should generate to populate the
symbol load. I've been poking through other architecture's code but
haven't had much luck.
Thanks,
-Sam Ellicott
Soli Deo Gloria



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