Re: [Freeipmi-devel] Supermicro X8DTG-QF System Event Log

[Al Chu]

Hey Gotz,

Well, I'm going to guess that "OVERHEAT" is the only SEL event that can
occur then.  I'll work on a patch.

Al

On Tue, 2012-02-07 at 07:56 -0800, Götz Waschk wrote:
> On Tue, Feb 7, 2012 at 4:44 PM, Al Chu <address@hidden> wrote:
> > Could you try a few more 0x04-0x0F
> >
> > "0x04 0xFF 0xFF"
> > "0x05 0xFF 0xFF"
> > ...
> > "0x0E 0xFF 0xFF"
> > "0x0F 0xFF 0xFF"
> OK:
> 
> 13 | Feb-07-2012 | 17:51:53 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 04h
> 14 | Feb-07-2012 | 17:51:56 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 05h
> 15 | Feb-07-2012 | 17:52:00 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 06h
> 16 | Feb-07-2012 | 17:52:04 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 07h
> 17 | Feb-07-2012 | 17:52:07 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 08h
> 18 | Feb-07-2012 | 17:52:11 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 09h
> 19 | Feb-07-2012 | 17:52:15 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 0Ah
> 20 | Feb-07-2012 | 17:52:18 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 0Bh
> 21 | Feb-07-2012 | 17:52:21 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 0Ch
> 22 | Feb-07-2012 | 17:52:24 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 0Dh
> 23 | Feb-07-2012 | 17:52:29 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 0Eh
> 24 | Feb-07-2012 | 17:52:32 | Sensor #2      | OEM Reserved      | OEM
> Event Offset = 0Fh
> 
> RID:[0D][00] RT:[02] TS:[A9][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [04] ED2: [FF] ED3: [FF]
> RID:[0E][00] RT:[02] TS:[AC][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [05] ED2: [FF] ED3: [FF]
> RID:[0F][00] RT:[02] TS:[B0][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [06] ED2: [FF] ED3: [FF]
> RID:[10][00] RT:[02] TS:[B4][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [07] ED2: [FF] ED3: [FF]
> RID:[11][00] RT:[02] TS:[B7][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [08] ED2: [FF] ED3: [FF]
> RID:[12][00] RT:[02] TS:[BB][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [09] ED2: [FF] ED3: [FF]
> RID:[13][00] RT:[02] TS:[BF][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [0A] ED2: [FF] ED3: [FF]
> RID:[14][00] RT:[02] TS:[C2][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [0B] ED2: [FF] ED3: [FF]
> RID:[15][00] RT:[02] TS:[C5][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [0C] ED2: [FF] ED3: [FF]
> RID:[16][00] RT:[02] TS:[C8][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [0D] ED2: [FF] ED3: [FF]
> RID:[17][00] RT:[02] TS:[CD][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [0E] ED2: [FF] ED3: [FF]
> RID:[18][00] RT:[02] TS:[D0][56][31][4F] GID:[21][00] ER:[04] ST:[C0]
> SN:[02] EDIR:[F0] ED1: [0F] ED2: [FF] ED3: [FF]
> 
> 
> Event:13 Time:02/07/2012 16:51:53 Type:OEM
> CPU2 Temp  De-assertion: OEM| Event = CPU Temp Overheat
> ------------------------------------------------------------------
> Event:14 Time:02/07/2012 16:51:56 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:15 Time:02/07/2012 16:52:00 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:16 Time:02/07/2012 16:52:04 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:17 Time:02/07/2012 16:52:07 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:18 Time:02/07/2012 16:52:11 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:19 Time:02/07/2012 16:52:15 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:20 Time:02/07/2012 16:52:18 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:21 Time:02/07/2012 16:52:21 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:22 Time:02/07/2012 16:52:24 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:23 Time:02/07/2012 16:52:29 Type:OEM
> CPU2 Temp  De-assertion: undefined
> ------------------------------------------------------------------
> Event:24 Time:02/07/2012 16:52:32 Type:OEM
> CPU2 Temp  De-assertion: undefined
> 
> 
> 
-- 
Albert Chu
address@hidden
Computer Scientist
High Performance Systems Division
Lawrence Livermore National Laboratory