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Re: makefile - define targets, dependencies in a variable
From: |
psmith |
Subject: |
Re: makefile - define targets, dependencies in a variable |
Date: |
03 Nov 2006 18:21:40 -0500 |
User-agent: |
Gnus/5.09 (Gnus v5.9.0) Emacs/21.4 |
Steve Calfee <stevecalfee@hotmail.com> writes:
> So the question is can I define rules in a variable, and maybe give an
> example?
If you're using a sufficiently new make you can, with $(eval ...).
define myrule
$($1_LIB) : $($($1_LIB)_OBJS)
@echo $$($1_LIB)_OBJS
$(value $(AR) $(ARFLAGS) $@ $(addprefix $(OBJ_DIR)/,$(notdir $?)))
enddef
...
$(eval $(call myrule,$(PACKAGE_NAME)))
Or, anyway, something like that. I just jotted this down off the top of my
head. See the GNU make docs for more info.
Cheers!
--
-------------------------------------------------------------------------------
Paul D. Smith <psmith@gnu.org> Find some GNU make tips at:
http://www.gnu.org http://make.paulandlesley.org
"Please remain calm...I may be mad, but I am a professional." --Mad Scientist