Re: Scheme Coprocessor (Deuxieme partie)

[Henry Wu]

Thanks Joe for referencing Scheme86; I didn't even know the .ps files are still online!

Just my 2 cents: perhaps to run mit-scheme natively on a RISC with the vast hardware resources avail these days, it is not difficult to just compile down the [core] C interpreter, the old 68000 hand coded microcode interpreter, or the "pseudo" S86 microcode, then hand or machine optimize and put in ROM.  But then of course we would have just an interpreter, tree-structured s-code, and no advances in any GC technology that probably happened in the last 30 years!

I had a recent discussion with GJS and we lamented still not being able to fit DP flonums in 64 bits without lots of work.  It would obviously be cool for a hardware implementation to have native tagging support, but we also figured with all the new pipelining/i-cache hacks, the benefits % would be in the low single digits at best.

Fun to dream and reminisce ...

Henry

On February 19, 2020 at 5:24 PM, Joe Marshall <address@hidden> wrote:

You'd need a lot of support to get all the libraries running, but getting a bare-bones interpreter running shouldn't be insanely hard.

You'd probably want to start with some idea of how the garbage collector is going to work and how it interacts with the rest of the system.  The GC and memory management abstraction is seen as a black box by most of the interpreter, and the garbage collector "stops the world" when collecting so it appears like an atomic operation.  In any case, it will want to move objects around, and if you have pointers in machine registers, they will need to be updated by the garbage collector.

The Scheme78 chip and the Scheme81 chip both ran Scheme directly in hardware.  The current implementation of MIT Scheme is a (remote) descendant of the Scheme81 implementation.  You should also take a look at the Scheme-86 implementation.

https://www.researchgate.net/publication/2961473_Scheme-79_-_Lisp_on_a_Chip 

 https://www.researchgate.net/publication/37596596_Design_of_LISP-based_Processors_or_SCHEME_A_Dielectric_LISP_or_Finite_Memories_Considered_Harmful_or_LAMBDA_The_Ultimate_Opcoed

https://groups.csail.mit.edu/mac/users/mhwu/scheme86/scheme86-home.html 

 

On Wed, Feb 19, 2020 at 10:38 AM Scheming Pony <address@hidden> wrote:

The project I'm working on (a Libre CPU) could benefit from a symbolic coprocessor.  I thought MIT/Scheme would be a candidate for a prototype, running directly on one of the CPU cores.

What would it take MIT/Scheme run on a bare metal CPU (RISC-V or PowerPC) from ROM?  I'm guessing it would at least need some (hopefully) minimal Posix support.

Has this been done before?  CL has Mezzano, as a demonstration of this concept. The CPU will be running at 300 MHz, and there should be adequate memory--640K should be enough for a PC right?

-- Stewart Milberger

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~jrm