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[PULL 16/21] hw/arm/npcm7xx: Store derivative OTP fuse key in little end
From: |
Peter Maydell |
Subject: |
[PULL 16/21] hw/arm/npcm7xx: Store derivative OTP fuse key in little endian |
Date: |
Tue, 30 Apr 2024 17:48:37 +0100 |
From: Philippe Mathieu-Daudé <philmd@linaro.org>
Use little endian for derivative OTP fuse key.
Cc: qemu-stable@nongnu.org
Fixes: c752bb079b ("hw/nvram: NPCM7xx OTP device model")
Suggested-by: Avi Fishman <Avi.Fishman@nuvoton.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240422125813.1403-1-philmd@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/npcm7xx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index cc68b5d8f12..9f2d96c733a 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -24,6 +24,7 @@
#include "hw/qdev-clock.h"
#include "hw/qdev-properties.h"
#include "qapi/error.h"
+#include "qemu/bswap.h"
#include "qemu/units.h"
#include "sysemu/sysemu.h"
#include "target/arm/cpu-qom.h"
@@ -386,7 +387,7 @@ static void npcm7xx_init_fuses(NPCM7xxState *s)
* The initial mask of disabled modules indicates the chip derivative (e.g.
* NPCM750 or NPCM730).
*/
- value = tswap32(nc->disabled_modules);
+ value = cpu_to_le32(nc->disabled_modules);
npcm7xx_otp_array_write(&s->fuse_array, &value, NPCM7XX_FUSE_DERIVATIVE,
sizeof(value));
}
--
2.34.1
- [PULL 06/21] target/arm: Enable FEAT_ETS2 for -cpu max, (continued)
- [PULL 06/21] target/arm: Enable FEAT_ETS2 for -cpu max, Peter Maydell, 2024/04/30
- [PULL 08/21] target/arm: Enable FEAT_Spec_FPACC for -cpu max, Peter Maydell, 2024/04/30
- [PULL 05/21] target/arm: Enable FEAT_CSV2_3 for -cpu max, Peter Maydell, 2024/04/30
- [PULL 01/21] hw/core/clock: allow clock_propagate on child clocks, Peter Maydell, 2024/04/30
- [PULL 04/21] docs/system/arm/emulation.rst: Add missing implemented features, Peter Maydell, 2024/04/30
- [PULL 09/21] tests/avocado: update sunxi kernel from armbian to 6.6.16, Peter Maydell, 2024/04/30
- [PULL 11/21] hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz, Peter Maydell, 2024/04/30
- [PULL 12/21] hw/watchdog/sbsa_gwdt: Make watchdog timer frequency a QOM property, Peter Maydell, 2024/04/30
- [PULL 10/21] target/arm: Refactor default generic timer frequency handling, Peter Maydell, 2024/04/30
- [PULL 07/21] target/arm: Implement ID_AA64MMFR3_EL1, Peter Maydell, 2024/04/30
- [PULL 16/21] hw/arm/npcm7xx: Store derivative OTP fuse key in little endian,
Peter Maydell <=
- [PULL 18/21] hw/arm : Pass STM32L4x5 SYSCFG gpios to STM32L4x5 SoC, Peter Maydell, 2024/04/30
- [PULL 19/21] hw/arm : Create Bl475eMachineState, Peter Maydell, 2024/04/30
- [PULL 14/21] hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields, Peter Maydell, 2024/04/30
- [PULL 13/21] target/arm: Default to 1GHz cntfrq for 'max' and new CPUs, Peter Maydell, 2024/04/30
- [PULL 20/21] hw/arm : Connect DM163 to B-L475E-IOT01A, Peter Maydell, 2024/04/30
- [PULL 17/21] hw/display : Add device DM163, Peter Maydell, 2024/04/30
- [PULL 21/21] tests/qtest : Add testcase for DM163, Peter Maydell, 2024/04/30
- [PULL 15/21] hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size, Peter Maydell, 2024/04/30
- Re: [PULL 00/21] target-arm queue, Richard Henderson, 2024/04/30