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[Qemu-devel] [PULL 23/37] hw/arm/allwinner-a10: Add the 'A' SRAM and the
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 23/37] hw/arm/allwinner-a10: Add the 'A' SRAM and the SRAM controller |
Date: |
Mon, 7 Jan 2019 16:31:03 +0000 |
From: Philippe Mathieu-Daudé <address@hidden>
>From the "A10 User Manual V1.20" p.29: "3.2. Memory Mapping" and:
7. System Control
7.1. Overview
A10 embeds a high-speed SRAM which has been split into five segments.
See detailed memory mapping in following table:
Area Address Size (Bytes)
A1 0x00000000-0x00003FFF 16K
A2 0x00004000-0x00007FFF 16K
A3 0x00008000-0x0000B3FF 13K
A4 0x0000B400-0x0000BFFF 3K
Since for emulation purpose we don't need the segmentations, we simply define
the 'A' area as a single 48KB SRAM.
We don't implement the following others areas:
- 'B': 'Secure RAM' (64K),
- 'C': Debug/ISP SRAM
- 'D': USB SRAM
(qemu) info mtree
address-space: memory
0000000000000000-ffffffffffffffff (prio 0, i/o): system
0000000000000000-000000000000bfff (prio 0, ram): sram A
0000000001c00000-0000000001c00fff (prio -1000, i/o): a10-sram-ctrl
0000000001c0b000-0000000001c0bfff (prio 0, i/o): aw_emac
0000000001c18000-0000000001c18fff (prio 0, i/o): ahci
0000000001c18080-0000000001c180ff (prio 0, i/o): allwinner-ahci
0000000001c20400-0000000001c207ff (prio 0, i/o): allwinner-a10-pic
0000000001c20c00-0000000001c20fff (prio 0, i/o): allwinner-A10-timer
0000000001c28000-0000000001c2801f (prio 0, i/o): serial
0000000040000000-0000000047ffffff (prio 0, ram): cubieboard.ram
Reported-by: Charlie Smurthwaite <address@hidden>
Tested-by: Charlie Smurthwaite <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/arm/allwinner-a10.h | 1 +
hw/arm/allwinner-a10.c | 6 ++++++
2 files changed, 7 insertions(+)
diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h
index efb8fc81236..389e128d0fc 100644
--- a/include/hw/arm/allwinner-a10.h
+++ b/include/hw/arm/allwinner-a10.h
@@ -35,6 +35,7 @@ typedef struct AwA10State {
AwA10PICState intc;
AwEmacState emac;
AllwinnerAHCIState sata;
+ MemoryRegion sram_a;
} AwA10State;
#define ALLWINNER_H_
diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
index 9fe875cdb5e..df0d079ad0a 100644
--- a/hw/arm/allwinner-a10.c
+++ b/hw/arm/allwinner-a10.c
@@ -22,6 +22,7 @@
#include "hw/sysbus.h"
#include "hw/devices.h"
#include "hw/arm/allwinner-a10.h"
+#include "hw/misc/unimp.h"
static void aw_a10_init(Object *obj)
{
@@ -85,6 +86,11 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(sysbusdev, 4, s->irq[67]);
sysbus_connect_irq(sysbusdev, 5, s->irq[68]);
+ memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB,
+ &error_fatal);
+ memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
+ create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
+
/* FIXME use qdev NIC properties instead of nd_table[] */
if (nd_table[0].used) {
qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
--
2.19.2
- [Qemu-devel] [PULL 13/37] gdbstub: add support for extended mode packet, (continued)
- [Qemu-devel] [PULL 13/37] gdbstub: add support for extended mode packet, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 20/37] hw/arm: versal: Plug memory leaks, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 18/37] arm/xlnx-zynqmp: put APUs and RPUs in separate CPU clusters, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 22/37] cpus.c: Fix race condition in cpu_stop_current(), Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 16/37] gdbstub: gdb_set_stop_cpu: ignore request when process is not attached, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 21/37] MAINTAINERS: Add ARM-related files for hw/[misc|input|timer]/, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 24/37] qtest: Add set_irq_in command to set IRQ/GPIO level, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 23/37] hw/arm/allwinner-a10: Add the 'A' SRAM and the SRAM controller,
Peter Maydell <=
- [Qemu-devel] [PULL 27/37] arm: Instantiate NRF51 random number generator, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 25/37] arm: Add header to host common definition for nRF51 SOC peripherals, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 30/37] tests/microbit-test: Add Tests for nRF51 GPIO, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 26/37] hw/misc/nrf51_rng: Add NRF51 random number generator peripheral, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 31/37] hw/timer/nrf51_timer: Add nRF51 Timer peripheral, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 29/37] arm: Instantiate NRF51 general purpose I/O, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 28/37] hw/gpio/nrf51_gpio: Add nRF51 GPIO peripheral, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 37/37] Support u-boot noload images for arm as used by, NetBSD/evbarm GENERIC kernel., Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 33/37] tests/microbit-test: Add Tests for nRF51 Timer, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 32/37] arm: Instantiate NRF51 Timers, Peter Maydell, 2019/01/07