Re: [Qemu-devel] [PULL 0/5] x86 queue, 2019-01-14

[Peter Maydell]

On Mon, 14 Jan 2019 at 14:34, Eduardo Habkost <address@hidden> wrote:
>
> The following changes since commit 7260438b7056469610ee166f7abe9ff8a26b8b16:
>
>   Merge remote-tracking branch 
> 'remotes/palmer/tags/riscv-for-master-3.2-part2' into staging (2019-01-14 
> 11:41:43 +0000)
>
> are available in the Git repository at:
>
>   git://github.com/ehabkost/qemu.git tags/x86-next-pull-request
>
> for you to fetch changes up to abd5fc4c862d033a989552914149f01c9476bb16:
>
>   i386/kvm: add a comment explaining why .feat_names are commented out for 
> Hyper-V feature bits (2019-01-14 12:28:44 -0200)
>
> ----------------------------------------------------------------
> x86 queue, 2019-01-14
>
> * Reenable RDTSCP support on Opteron_G[345] CPU models CPU models
>   (Borislav Petkov)
> * host-phys-bits-limit option for better control of 5-level EPT
>   (Eduardo Habkost)
> * Disable MPX support on named CPU models (Paolo Bonzini)
> * expose HV_CPUID_ENLIGHTMENT_INFO.EAX and HV_CPUID_NESTED_FEATURES.EAX
>   as feature words (Vitaly Kuznetsov)
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0
for any user-visible changes.

-- PMM