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Re: [Qemu-devel] [PATCH v6 2/3] tcg: introduce dynamic TLB sizing
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From: |
Emilio G. Cota |
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Subject: |
Re: [Qemu-devel] [PATCH v6 2/3] tcg: introduce dynamic TLB sizing |
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Date: |
Mon, 14 Jan 2019 14:34:27 -0500 |
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User-agent: |
Mutt/1.9.4 (2018-02-28) |
On Mon, Jan 14, 2019 at 11:50:16 -0500, Emilio G. Cota wrote:
> Disabled in all TCG backends for now.
>
> Signed-off-by: Emilio G. Cota <address@hidden>
> ---
> include/exec/cpu-defs.h | 57 ++++++++++-
> include/exec/cpu_ldst.h | 21 ++++
> tcg/aarch64/tcg-target.h | 1 +
> tcg/arm/tcg-target.h | 1 +
> tcg/i386/tcg-target.h | 1 +
> tcg/mips/tcg-target.h | 1 +
> tcg/ppc/tcg-target.h | 1 +
> tcg/s390/tcg-target.h | 1 +
> tcg/sparc/tcg-target.h | 1 +
> tcg/tci/tcg-target.h | 1 +
> accel/tcg/cputlb.c | 202 ++++++++++++++++++++++++++++++++++++++-
> 11 files changed, 281 insertions(+), 7 deletions(-)
Just realised the riscv backend was recently merged. I've
updated this commit on the github branch with the following:
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h
index 60918cacb4..1eb032626c 100644
--- a/tcg/riscv/tcg-target.h
+++ b/tcg/riscv/tcg-target.h
@@ -33,6 +33,7 @@
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 20
+#define TCG_TARGET_IMPLEMENTS_DYN_TLB 0
#define TCG_TARGET_NB_REGS 32
Thanks,
E.