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[Qemu-devel] [PULL 04/22] exec: Add target-specific tlb bits to MemTxAtt
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 04/22] exec: Add target-specific tlb bits to MemTxAttrs |
Date: |
Tue, 5 Feb 2019 17:04:52 +0000 |
From: Richard Henderson <address@hidden>
These bits can be used to cache target-specific data in cputlb
read from the page tables.
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/exec/memattrs.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index d4a16420984..d4a3477d71d 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -37,6 +37,16 @@ typedef struct MemTxAttrs {
unsigned int user:1;
/* Requester ID (for MSI for example) */
unsigned int requester_id:16;
+ /*
+ * The following are target-specific page-table bits. These are not
+ * related to actual memory transactions at all. However, this structure
+ * is part of the tlb_fill interface, cached in the cputlb structure,
+ * and has unused bits. These fields will be read by target-specific
+ * helpers using env->iotlb[mmu_idx][tlb_index()].attrs.target_tlb_bitN.
+ */
+ unsigned int target_tlb_bit0 : 1;
+ unsigned int target_tlb_bit1 : 1;
+ unsigned int target_tlb_bit2 : 1;
} MemTxAttrs;
/* Bus masters which don't specify any attributes will get this,
--
2.20.1
- [Qemu-devel] [PULL 00/22] target-arm queue, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 02/22] target/arm: Add PSTATE.BTYPE, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 10/22] linux-user: Implement PR_PAC_RESET_KEYS, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 21/22] hw/arm/boot: Support DTB autoload for firmware-only boots, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 01/22] target/arm: Introduce isar_feature_aa64_bti, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 15/22] target/arm: Enable TBI for user-only, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 04/22] exec: Add target-specific tlb bits to MemTxAttrs,
Peter Maydell <=
- [Qemu-devel] [PULL 07/22] target/arm: Reset btype for direct branches, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 09/22] target/arm: Enable BTI for -cpu max, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 14/22] target/arm: Compute TB_FLAGS for TBI for user-only, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 19/22] hw/arm/boot: Factor out "set up firmware boot" code, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 12/22] target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 03/22] target/arm: Add BT and BTYPE to tb->flags, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 06/22] target/arm: Default handling of BTYPE during translation, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 16/22] gdbstub: allow killing QEMU via vKill command, Peter Maydell, 2019/02/05
- [Qemu-devel] [PULL 11/22] tests/tcg/aarch64: Add pauth smoke test, Peter Maydell, 2019/02/05