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[Qemu-devel] [PULL 14/21] hw/arm/armsse: Document SRAM_ADDR_WIDTH proper
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 14/21] hw/arm/armsse: Document SRAM_ADDR_WIDTH property in header comment |
Date: |
Thu, 21 Feb 2019 18:57:32 +0000 |
In commit 4b635cf7a95e501211 we added a QOM property to the ARMSSE
object, but forgot to add it to the documentation comment in the
header. Correct the omission.
Fixes: 4b635cf7a95e501211 ("hw/arm/armsse: Make SRAM bank size configurable")
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
include/hw/arm/armsse.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index f800bafb14a..444605b44dc 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -46,6 +46,8 @@
* being the same for both, to avoid having to have separate Property
* lists for different variants. This restriction can be relaxed later
* if necessary.)
+ * + QOM property "SRAM_ADDR_WIDTH" sets the number of bits used for the
+ * address of each SRAM bank (and thus the total amount of internal SRAM)
* + Named GPIO inputs "EXP_IRQ" 0..n are the expansion interrupts for CPU 0,
* which are wired to its NVIC lines 32 .. n+32
* + Named GPIO inputs "EXP_CPU1_IRQ" 0..n are the expansion interrupts for
--
2.20.1
- [Qemu-devel] [PULL 00/21] target-arm queue, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 02/21] target/arm: v8M MPU should use background region as default, not always, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 01/21] hw/arm/armsse: Fix memory leak in error-exit path, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 04/21] target/arm: Restructure disas_fp_int_conv, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 10/21] hw/timer/pl031: Convert to using trace events, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 03/21] target/arm: Stop unintentional sign extension in pmu_init, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 13/21] hw/char/pl011: Use '0x' prefix when logging hex numbers, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 09/21] hw/timer/pl031: Allow use as an embedded-struct device, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 11/21] hw/char/pl011: Allow use as an embedded-struct device, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 14/21] hw/arm/armsse: Document SRAM_ADDR_WIDTH property in header comment,
Peter Maydell <=
- [Qemu-devel] [PULL 12/21] hw/char/pl011: Support all interrupt lines, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 07/21] target/arm: Implement ARMv8.3-JSConv, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 06/21] target/arm: Rearrange Floating-point data-processing (2 regs), Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 20/21] hw/arm/musca: Wire up PL011 UARTs, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 16/21] hw/arm/musca.c: Implement models of the Musca-A and -B1 boards, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 17/21] hw/arm/musca: Add PPCs, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 08/21] hw/misc/tz-ppc: Support having unused ports in the middle of the range, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 15/21] hw/arm/armsse: Allow boards to specify init-svtor, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 18/21] hw/arm/musca: Add MPCs, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 19/21] hw/arm/musca: Wire up PL031 RTC, Peter Maydell, 2019/02/21