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[Qemu-devel] [PULL 15/21] hw/arm/armsse: Allow boards to specify init-sv
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 15/21] hw/arm/armsse: Allow boards to specify init-svtor |
Date: |
Thu, 21 Feb 2019 18:57:33 +0000 |
The Musca boards have DAPLink firmware that sets the initial
secure VTOR value (the location of the vector table) differently
depending on the boot mode (from flash, from RAM, etc). Export
the init-svtor as a QOM property of the ARMSSE object so that
the board can change it.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
include/hw/arm/armsse.h | 3 +++
hw/arm/armsse.c | 8 ++++----
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index 444605b44dc..84879f40dd8 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -48,6 +48,8 @@
* if necessary.)
* + QOM property "SRAM_ADDR_WIDTH" sets the number of bits used for the
* address of each SRAM bank (and thus the total amount of internal SRAM)
+ * + QOM property "init-svtor" sets the initial value of the CPU SVTOR
register
+ * (where it expects to load the PC and SP from the vector table on reset)
* + Named GPIO inputs "EXP_IRQ" 0..n are the expansion interrupts for CPU 0,
* which are wired to its NVIC lines 32 .. n+32
* + Named GPIO inputs "EXP_CPU1_IRQ" 0..n are the expansion interrupts for
@@ -204,6 +206,7 @@ typedef struct ARMSSE {
uint32_t exp_numirq;
uint32_t mainclk_frq;
uint32_t sram_addr_width;
+ uint32_t init_svtor;
} ARMSSE;
typedef struct ARMSSEInfo ARMSSEInfo;
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index d0207dbabc7..50da41f64c5 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -505,11 +505,10 @@ static void armsse_realize(DeviceState *dev, Error **errp)
* the INITSVTOR* registers before powering up the CPUs in any case,
* so the hardware's default value doesn't matter. QEMU doesn't emulate
* the control processor, so instead we behave in the way that the
- * firmware does. All boards currently known about have firmware that
- * sets the INITSVTOR0 and INITSVTOR1 registers to 0x10000000, like the
- * IoTKit default. We can make this more configurable if necessary.
+ * firmware does. The initial value is configurable by the board code
+ * to match whatever its firmware does.
*/
- qdev_prop_set_uint32(cpudev, "init-svtor", 0x10000000);
+ qdev_prop_set_uint32(cpudev, "init-svtor", s->init_svtor);
/*
* Start all CPUs except CPU0 powered down. In real hardware it is
* a configurable property of the SSE-200 which CPUs start powered up
@@ -1187,6 +1186,7 @@ static Property armsse_properties[] = {
DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
DEFINE_PROP_UINT32("MAINCLK", ARMSSE, mainclk_frq, 0),
DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15),
+ DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000),
DEFINE_PROP_END_OF_LIST()
};
--
2.20.1
- [Qemu-devel] [PULL 09/21] hw/timer/pl031: Allow use as an embedded-struct device, (continued)
- [Qemu-devel] [PULL 09/21] hw/timer/pl031: Allow use as an embedded-struct device, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 11/21] hw/char/pl011: Allow use as an embedded-struct device, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 14/21] hw/arm/armsse: Document SRAM_ADDR_WIDTH property in header comment, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 12/21] hw/char/pl011: Support all interrupt lines, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 07/21] target/arm: Implement ARMv8.3-JSConv, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 06/21] target/arm: Rearrange Floating-point data-processing (2 regs), Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 20/21] hw/arm/musca: Wire up PL011 UARTs, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 16/21] hw/arm/musca.c: Implement models of the Musca-A and -B1 boards, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 17/21] hw/arm/musca: Add PPCs, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 08/21] hw/misc/tz-ppc: Support having unused ports in the middle of the range, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 15/21] hw/arm/armsse: Allow boards to specify init-svtor,
Peter Maydell <=
- [Qemu-devel] [PULL 18/21] hw/arm/musca: Add MPCs, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 19/21] hw/arm/musca: Wire up PL031 RTC, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 21/21] hw/arm/armsse: Make 0x5... alias region work for per-CPU devices, Peter Maydell, 2019/02/21
- [Qemu-devel] [PULL 05/21] target/arm: Split out vfp_helper.c, Peter Maydell, 2019/02/21
- Re: [Qemu-devel] [PULL 00/21] target-arm queue, Peter Maydell, 2019/02/22