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Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree
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Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree |
Date: |
Wed, 27 Feb 2019 11:57:13 -0800 (PST) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
b3680b9211 target/riscv: Remaining rvc insn reuse 32 bit translators
353eaa0c82 target/riscv: Splice remaining compressed insn pairs for riscv32 vs
riscv64
47eb4ce57f target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
bcd933a911 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
ed1fe94b1a target/riscv: Convert @cs_2 insns to share translation functions
8dc2e2f80c target/riscv: Remove decode_RV32_64G()
8be8ea8835 target/riscv: Remove gen_system()
9c8dab6a0d target/riscv: Rename trans_arith to gen_arith
dbc939326b target/riscv: Remove manual decoding of RV32/64M insn
0fc82cee12 target/riscv: Remove shift and slt insn manual decoding
b48a7a1ffa target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
15e618a3c0 target/riscv: Move gen_arith_imm() decoding into trans_* functions
5832bf5371 target/riscv: Remove manual decoding from gen_store()
8e8ae1a6ff target/riscv: Remove manual decoding from gen_load()
72b0bc8e6b target/riscv: Remove manual decoding from gen_branch()
6220e2a4ee target/riscv: Remove gen_jalr()
22a61ce9be target/riscv: Convert quadrant 2 of RVXC insns to decodetree
3431c59aa7 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
c0277a3524 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
dd7ac7d493 target/riscv: Convert RV priv insns to decodetree
fd0102d6bd target/riscv: Convert RV64D insns to decodetree
15a42d4ebf target/riscv: Convert RV32D insns to decodetree
e3af3901b7 target/riscv: Convert RV64F insns to decodetree
5f78f14ea9 target/riscv: Convert RV32F insns to decodetree
c5a4843d91 target/riscv: Convert RV64A insns to decodetree
e15b1c8d50 target/riscv: Convert RV32A insns to decodetree
e516885419 target/riscv: Convert RVXM insns to decodetree
423134822e target/riscv: Convert RVXI csr insns to decodetree
3e129a19d0 target/riscv: Convert RVXI fence insns to decodetree
ed768ba555 target/riscv: Convert RVXI arithmetic insns to decodetree
15ccf67408 target/riscv: Convert RV64I load/store insns to decodetree
aa66ca6313 target/riscv: Convert RV32I load/store insns to decodetree
ff1e687da9 target/riscv: Convert RVXI branch insns to decodetree
d865d233c4 target/riscv: Activate decodetree and implemnt LUI & AUIPC
=== OUTPUT BEGIN ===
1/34 Checking commit d865d233c40d (target/riscv: Activate decodetree and
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34:
new file mode 100644
ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1884:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);
total: 1 errors, 1 warnings, 125 lines checked
Patch 1/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
2/34 Checking commit ff1e687da98c (target/riscv: Convert RVXI branch insns to
decodetree)
3/34 Checking commit aa66ca631309 (target/riscv: Convert RV32I load/store insns
to decodetree)
4/34 Checking commit 15ccf6740861 (target/riscv: Convert RV64I load/store insns
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39:
new file mode 100644
total: 0 errors, 1 warnings, 76 lines checked
Patch 4/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/34 Checking commit ed768ba5551a (target/riscv: Convert RVXI arithmetic insns
to decodetree)
6/34 Checking commit 3e129a19d0dd (target/riscv: Convert RVXI fence insns to
decodetree)
7/34 Checking commit 423134822ee2 (target/riscv: Convert RVXI csr insns to
decodetree)
8/34 Checking commit e516885419d8 (target/riscv: Convert RVXM insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 169 lines checked
Patch 8/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/34 Checking commit e15b1c8d5077 (target/riscv: Convert RV32A insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54:
new file mode 100644
total: 0 errors, 1 warnings, 199 lines checked
Patch 9/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/34 Checking commit c5a4843d91d2 (target/riscv: Convert RV64A insns to
decodetree)
11/34 Checking commit 5f78f14ea996 (target/riscv: Convert RV32F insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 1 warnings, 442 lines checked
Patch 11/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/34 Checking commit e3af3901b766 (target/riscv: Convert RV64F insns to
decodetree)
13/34 Checking commit 15a42d4ebfdf (target/riscv: Convert RV32D insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51:
new file mode 100644
total: 0 errors, 1 warnings, 398 lines checked
Patch 13/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/34 Checking commit fd0102d6bd23 (target/riscv: Convert RV64D insns to
decodetree)
15/34 Checking commit dd7ac7d49373 (target/riscv: Convert RV priv insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41:
new file mode 100644
total: 0 errors, 1 warnings, 214 lines checked
Patch 15/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
16/34 Checking commit c0277a3524e9 (target/riscv: Convert quadrant 0 of RVXC
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31:
new file mode 100644
ERROR: externs should be avoided in .c files
#251: FILE: target/riscv/translate.c:1072:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 231 lines checked
Patch 16/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/34 Checking commit 3431c59aa72c (target/riscv: Convert quadrant 1 of RVXC
insns to decodetree)
18/34 Checking commit 22a61ce9be34 (target/riscv: Convert quadrant 2 of RVXC
insns to decodetree)
19/34 Checking commit 6220e2a4ee3b (target/riscv: Remove gen_jalr())
20/34 Checking commit 72b0bc8e6beb (target/riscv: Remove manual decoding from
gen_branch())
21/34 Checking commit 8e8ae1a6ff12 (target/riscv: Remove manual decoding from
gen_load())
22/34 Checking commit 5832bf537181 (target/riscv: Remove manual decoding from
gen_store())
23/34 Checking commit 15e618a3c002 (target/riscv: Move gen_arith_imm() decoding
into trans_* functions)
24/34 Checking commit b48a7a1ffa3b (target/riscv: make ADD/SUB/OR/XOR/AND insn
use arg lists)
25/34 Checking commit 0fc82cee1229 (target/riscv: Remove shift and slt insn
manual decoding)
26/34 Checking commit dbc939326b61 (target/riscv: Remove manual decoding of
RV32/64M insn)
27/34 Checking commit 9c8dab6a0dd4 (target/riscv: Rename trans_arith to
gen_arith)
28/34 Checking commit 8be8ea883508 (target/riscv: Remove gen_system())
29/34 Checking commit 8dc2e2f80c80 (target/riscv: Remove decode_RV32_64G())
30/34 Checking commit ed1fe94b1a06 (target/riscv: Convert @cs_2 insns to share
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42:
new file mode 100644
ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:548:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 164 lines checked
Patch 30/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
31/34 Checking commit bcd933a911cf (target/riscv: Convert @cl_d, @cl_w, @cs_d,
@cs_w insns)
32/34 Checking commit 47eb4ce57fd3 (target/riscv: Splice fsw_sd and flw_ld for
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28:
new file mode 100644
total: 0 errors, 1 warnings, 309 lines checked
Patch 32/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
33/34 Checking commit 353eaa0c822f (target/riscv: Splice remaining compressed
insn pairs for riscv32 vs riscv64)
34/34 Checking commit b3680b921129 (target/riscv: Remaining rvc insn reuse 32
bit translators)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, (continued)
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree,
no-reply <=
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27