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[PULL 49/65] target/riscv/cpu.c: finalize satp_mode earlier
From: |
Alistair Francis |
Subject: |
[PULL 49/65] target/riscv/cpu.c: finalize satp_mode earlier |
Date: |
Wed, 10 Jan 2024 18:57:17 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Profiles will need to validate satp_mode during their own finalize
methods. This will occur inside riscv_tcg_cpu_finalize_features() for
TCG. Given that satp_mode does not have any pre-req from the accelerator
finalize() method, it's safe to finalize it earlier.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20231218125334.37184-22-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 563fd4f722..65f69a7dd3 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1054,6 +1054,14 @@ void riscv_cpu_finalize_features(RISCVCPU *cpu, Error
**errp)
{
Error *local_err = NULL;
+#ifndef CONFIG_USER_ONLY
+ riscv_cpu_satp_mode_finalize(cpu, &local_err);
+ if (local_err != NULL) {
+ error_propagate(errp, local_err);
+ return;
+ }
+#endif
+
/*
* KVM accel does not have a specialized finalize()
* callback because its extensions are validated
@@ -1066,14 +1074,6 @@ void riscv_cpu_finalize_features(RISCVCPU *cpu, Error
**errp)
return;
}
}
-
-#ifndef CONFIG_USER_ONLY
- riscv_cpu_satp_mode_finalize(cpu, &local_err);
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- return;
- }
-#endif
}
static void riscv_cpu_realize(DeviceState *dev, Error **errp)
--
2.43.0
- [PULL 36/65] target/riscv: add rva22u64 profile definition, (continued)
- [PULL 36/65] target/riscv: add rva22u64 profile definition, Alistair Francis, 2024/01/10
- [PULL 38/65] target/riscv/tcg: add user flag for profile support, Alistair Francis, 2024/01/10
- [PULL 43/65] target/riscv/tcg: honor user choice for G MISA bits, Alistair Francis, 2024/01/10
- [PULL 39/65] target/riscv/tcg: add MISA user options hash, Alistair Francis, 2024/01/10
- [PULL 42/65] target/riscv/tcg: add hash table insert helpers, Alistair Francis, 2024/01/10
- [PULL 44/65] target/riscv/tcg: validate profiles during finalize, Alistair Francis, 2024/01/10
- [PULL 45/65] riscv-qmp-cmds.c: add profile flags in cpu-model-expansion, Alistair Francis, 2024/01/10
- [PULL 46/65] target/riscv: add 'rva22u64' CPU, Alistair Francis, 2024/01/10
- [PULL 47/65] target/riscv: implement svade, Alistair Francis, 2024/01/10
- [PULL 48/65] target/riscv: add priv ver restriction to profiles, Alistair Francis, 2024/01/10
- [PULL 49/65] target/riscv/cpu.c: finalize satp_mode earlier,
Alistair Francis <=
- [PULL 50/65] target/riscv/cpu.c: add riscv_cpu_is_32bit(), Alistair Francis, 2024/01/10
- [PULL 51/65] target/riscv: add satp_mode profile support, Alistair Francis, 2024/01/10
- [PULL 52/65] target/riscv: add 'parent' in profile description, Alistair Francis, 2024/01/10
- [PULL 53/65] target/riscv: add RVA22S64 profile, Alistair Francis, 2024/01/10
- [PULL 54/65] target/riscv: add rva22s64 cpu, Alistair Francis, 2024/01/10
- [PULL 55/65] target/riscv/kvm.c: remove group setting of KVM AIA if the machine only has 1 socket, Alistair Francis, 2024/01/10
- [PULL 56/65] linux-headers: Update to Linux v6.7-rc5, Alistair Francis, 2024/01/10
- [PULL 57/65] linux-headers: riscv: add ptrace.h, Alistair Francis, 2024/01/10
- [PULL 63/65] target/riscv: Assert that the CSR numbers will be correct, Alistair Francis, 2024/01/10
- [PULL 61/65] roms/opensbi: Upgrade from v1.3.1 to v1.4, Alistair Francis, 2024/01/10