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[Qemu-ppc] [PULL 016/130] target-ppc: disable unsupported modes for SPR_
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 016/130] target-ppc: disable unsupported modes for SPR_CTRL/SPR_UCTRL |
Date: |
Fri, 7 Mar 2014 00:32:23 +0100 |
From: Alexey Kardashevskiy <address@hidden>
The Figure 17 "SPR encodings" of the PowerISA 2.07 describes CTRL SPR as:
priviledged
# spr5-9 spr0-4 name mtspr mfspr len cat
136 00100 01000 CTRL - no 32 S
152 00100 11000 CTRL yes - 32 S
According to this chart, the hypervisor's CTRL (#152) does not support
reading, the user-space's CTRL (UCTRL, #136) does not support writing.
This replaces unsupported operations with the default SPR_NOACCESS hook.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate_init.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index d751fc3..02f5867 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6739,11 +6739,11 @@ static void init_proc_970FX (CPUPPCState *env)
0x00000000);
spr_register(env, SPR_CTRL, "SPR_CTRL",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ SPR_NOACCESS, &spr_write_generic,
0x00000000);
spr_register(env, SPR_UCTRL, "SPR_UCTRL",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, SPR_NOACCESS,
0x00000000);
spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
&spr_read_generic, &spr_write_generic,
@@ -6909,11 +6909,11 @@ static void init_proc_power5plus(CPUPPCState *env)
0x00000000);
spr_register(env, SPR_CTRL, "SPR_CTRL",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ SPR_NOACCESS, &spr_write_generic,
0x00000000);
spr_register(env, SPR_UCTRL, "SPR_UCTRL",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, SPR_NOACCESS,
0x00000000);
spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
&spr_read_generic, &spr_write_generic,
@@ -7014,11 +7014,11 @@ static void init_proc_POWER7 (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_CTRL, "SPR_CTRLT",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ SPR_NOACCESS, &spr_write_generic,
0x80800000);
spr_register(env, SPR_UCTRL, "SPR_CTRLF",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, SPR_NOACCESS,
0x80800000);
spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
&spr_read_generic, &spr_write_generic,
--
1.8.1.4
- [Qemu-ppc] [PULL 00/130] ppc patch queue 2014-03-05, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 002/130] target-ppc: fix LPCR SPR number, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 001/130] target-ppc: fix compile error when PPC_DUMP_CPU is enabled, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 009/130] target-ppc: dump DAR and DSISR, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 010/130] target-ppc: fix Authority Mask Register init value, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 003/130] target-ppc: remove powerpc 970gx, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 005/130] target-ppc: remove embedded MMU SPRs from 970, P5+/7/7+/8, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 006/130] target-ppc: remove unsupported SPRs from 970 and P5+, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 007/130] KVM: Split QEMUMachine typedef into separate header, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 016/130] target-ppc: disable unsupported modes for SPR_CTRL/SPR_UCTRL,
Alexander Graf <=
- [Qemu-ppc] [PULL 014/130] spapr-pci: enable adding PHB via -device, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 012/130] PPC: KVM: fix "set one register", Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 027/130] target-ppc: Add VSX ISA2.06 Multiply Add Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 019/130] target-ppc: Add VSX ISA2.06 xadd/xsub Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 011/130] mmu-hash64: fix Virtual Page Class Key Protection, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 021/130] target-ppc: Add VSX ISA2.06 xdiv Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 004/130] target-ppc: fix SPR_CTRL/SPR_UCTRL register numbers, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 031/130] target-ppc: Add VSX Floating Point to Floating Point Conversion Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 032/130] target-ppc: Add VSX ISA2.06 Integer Conversion Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 048/130] target-ppc: Move To/From VSR Instructions, Alexander Graf, 2014/03/06