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[Qemu-ppc] [PULL 54/66] ppc: Rename #include'd .c files to .inc.c
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 54/66] ppc: Rename #include'd .c files to .inc.c |
Date: |
Tue, 6 Sep 2016 13:43:04 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
Also while at it, group the #include statements in translate.c
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 40 +++++++++++-----------
.../translate/{dfp-impl.c => dfp-impl.inc.c} | 0
target-ppc/translate/{dfp-ops.c => dfp-ops.inc.c} | 0
target-ppc/translate/{fp-impl.c => fp-impl.inc.c} | 0
target-ppc/translate/{fp-ops.c => fp-ops.inc.c} | 0
.../translate/{spe-impl.c => spe-impl.inc.c} | 0
target-ppc/translate/{spe-ops.c => spe-ops.inc.c} | 0
.../translate/{vmx-impl.c => vmx-impl.inc.c} | 0
target-ppc/translate/{vmx-ops.c => vmx-ops.inc.c} | 0
.../translate/{vsx-impl.c => vsx-impl.inc.c} | 0
target-ppc/translate/{vsx-ops.c => vsx-ops.inc.c} | 0
11 files changed, 20 insertions(+), 20 deletions(-)
rename target-ppc/translate/{dfp-impl.c => dfp-impl.inc.c} (100%)
rename target-ppc/translate/{dfp-ops.c => dfp-ops.inc.c} (100%)
rename target-ppc/translate/{fp-impl.c => fp-impl.inc.c} (100%)
rename target-ppc/translate/{fp-ops.c => fp-ops.inc.c} (100%)
rename target-ppc/translate/{spe-impl.c => spe-impl.inc.c} (100%)
rename target-ppc/translate/{spe-ops.c => spe-ops.inc.c} (100%)
rename target-ppc/translate/{vmx-impl.c => vmx-impl.inc.c} (100%)
rename target-ppc/translate/{vmx-ops.c => vmx-ops.inc.c} (100%)
rename target-ppc/translate/{vsx-impl.c => vsx-impl.inc.c} (100%)
rename target-ppc/translate/{vsx-ops.c => vsx-ops.inc.c} (100%)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 14f4b68..0a5a3e2 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -5316,12 +5316,6 @@ static void gen_rfsvc(DisasContext *ctx)
#endif /* defined(CONFIG_USER_ONLY) */
}
-#include "translate/fp-impl.c"
-
-#include "translate/vmx-impl.c"
-
-#include "translate/vsx-impl.c"
-
/* svc is not implemented for now */
/* BookE specific instructions */
@@ -6108,10 +6102,6 @@ static void gen_maddhd_maddhdu(DisasContext *ctx)
}
#endif /* defined(TARGET_PPC64) */
-#include "translate/dfp-impl.c"
-
-#include "translate/spe-impl.c"
-
static void gen_tbegin(DisasContext *ctx)
{
if (unlikely(!ctx->tm_enabled)) {
@@ -6191,6 +6181,16 @@ static inline void gen_##name(DisasContext *ctx)
\
GEN_TM_PRIV_NOOP(treclaim);
GEN_TM_PRIV_NOOP(trechkpt);
+#include "translate/fp-impl.inc.c"
+
+#include "translate/vmx-impl.inc.c"
+
+#include "translate/vsx-impl.inc.c"
+
+#include "translate/dfp-impl.inc.c"
+
+#include "translate/spe-impl.inc.c"
+
static opcode_t opcodes[] = {
GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE),
GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER),
@@ -6715,16 +6715,6 @@ GEN_MAC_HANDLER(mulhhwu, 0x08, 0x00),
GEN_MAC_HANDLER(mullhw, 0x08, 0x0D),
GEN_MAC_HANDLER(mullhwu, 0x08, 0x0C),
-#include "translate/fp-ops.c"
-
-#include "translate/vmx-ops.c"
-
-#include "translate/vsx-ops.c"
-
-#include "translate/dfp-ops.c"
-
-#include "translate/spe-ops.c"
-
GEN_HANDLER2_E(tbegin, "tbegin", 0x1F, 0x0E, 0x14, 0x01DFF800, \
PPC_NONE, PPC2_TM),
GEN_HANDLER2_E(tend, "tend", 0x1F, 0x0E, 0x15, 0x01FFF800, \
@@ -6747,6 +6737,16 @@ GEN_HANDLER2_E(treclaim, "treclaim", 0x1F, 0x0E, 0x1D,
0x03E0F800, \
PPC_NONE, PPC2_TM),
GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F, 0x03FFF800, \
PPC_NONE, PPC2_TM),
+
+#include "translate/fp-ops.inc.c"
+
+#include "translate/vmx-ops.inc.c"
+
+#include "translate/vsx-ops.inc.c"
+
+#include "translate/dfp-ops.inc.c"
+
+#include "translate/spe-ops.inc.c"
};
#include "helper_regs.h"
diff --git a/target-ppc/translate/dfp-impl.c
b/target-ppc/translate/dfp-impl.inc.c
similarity index 100%
rename from target-ppc/translate/dfp-impl.c
rename to target-ppc/translate/dfp-impl.inc.c
diff --git a/target-ppc/translate/dfp-ops.c b/target-ppc/translate/dfp-ops.inc.c
similarity index 100%
rename from target-ppc/translate/dfp-ops.c
rename to target-ppc/translate/dfp-ops.inc.c
diff --git a/target-ppc/translate/fp-impl.c b/target-ppc/translate/fp-impl.inc.c
similarity index 100%
rename from target-ppc/translate/fp-impl.c
rename to target-ppc/translate/fp-impl.inc.c
diff --git a/target-ppc/translate/fp-ops.c b/target-ppc/translate/fp-ops.inc.c
similarity index 100%
rename from target-ppc/translate/fp-ops.c
rename to target-ppc/translate/fp-ops.inc.c
diff --git a/target-ppc/translate/spe-impl.c
b/target-ppc/translate/spe-impl.inc.c
similarity index 100%
rename from target-ppc/translate/spe-impl.c
rename to target-ppc/translate/spe-impl.inc.c
diff --git a/target-ppc/translate/spe-ops.c b/target-ppc/translate/spe-ops.inc.c
similarity index 100%
rename from target-ppc/translate/spe-ops.c
rename to target-ppc/translate/spe-ops.inc.c
diff --git a/target-ppc/translate/vmx-impl.c
b/target-ppc/translate/vmx-impl.inc.c
similarity index 100%
rename from target-ppc/translate/vmx-impl.c
rename to target-ppc/translate/vmx-impl.inc.c
diff --git a/target-ppc/translate/vmx-ops.c b/target-ppc/translate/vmx-ops.inc.c
similarity index 100%
rename from target-ppc/translate/vmx-ops.c
rename to target-ppc/translate/vmx-ops.inc.c
diff --git a/target-ppc/translate/vsx-impl.c
b/target-ppc/translate/vsx-impl.inc.c
similarity index 100%
rename from target-ppc/translate/vsx-impl.c
rename to target-ppc/translate/vsx-impl.inc.c
diff --git a/target-ppc/translate/vsx-ops.c b/target-ppc/translate/vsx-ops.inc.c
similarity index 100%
rename from target-ppc/translate/vsx-ops.c
rename to target-ppc/translate/vsx-ops.inc.c
--
2.7.4
- [Qemu-ppc] [PULL 48/66] target-ppc: add dtstsfi[q] instructions, (continued)
- [Qemu-ppc] [PULL 48/66] target-ppc: add dtstsfi[q] instructions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 49/66] target-ppc: add vabsdu[b, h, w] instructions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 34/66] ppc: Don't update NIP BookE 2.06 tlbwe, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 61/66] ppc: Improve flags for helpers loading/writing the time facilities, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 38/66] ppc: Make alignment exceptions suck less, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 62/66] ppc: Improve the exception helpers flags, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 53/66] target-ppc: add extswsli[.] instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 63/66] ppc: Improve a few more helper flags, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 55/66] hw/ppc: use error_report instead of fprintf, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 58/66] ppc: Fix catching some segfaults in user mode, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 54/66] ppc: Rename #include'd .c files to .inc.c,
David Gibson <=
- [Qemu-ppc] [PULL 07/66] target-ppc: add modulo word operations, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 32/66] ppc: Don't update NIP in DCR access routines, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 51/66] target-ppc: add vslv instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 60/66] ppc: Don't generate dead code on unconditional branches, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 17/66] ppc: Move classic fp ops out of translate.c, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 05/66] target-ppc: adding addpcis instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 26/66] ppc: FP exceptions are always precise, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 33/66] ppc: Don't update NIP in facility unavailable interrupts, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 13/66] target-ppc: add maddld instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 11/66] target-ppc: add cmpeqb instruction, David Gibson, 2016/09/05