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Re: [Qemu-ppc] [PATCH 05/12] target/ppc: Cleanup 64-bit MMU includes
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH 05/12] target/ppc: Cleanup 64-bit MMU includes |
Date: |
Tue, 19 Feb 2019 14:49:17 +1100 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
On Fri, Feb 15, 2019 at 06:00:22PM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt <address@hidden>
>
> To enable inlining more things, move #include of mmu-hash64.h and
> mmu-radix64.h to mmu-book3s-v3.h
>
> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> Signed-off-by: Cédric Le Goater <address@hidden>
I don't really get what this is in aid of, and it doesn't seem quite
right.
It's fair enough in mmu-book3s-v3.c. But mmu-hash64.c handles 64-bit
hash MMUs earlier than V3 as well, so it doesn't really make sense for
it to get to mmu-hash64.c via an indirect include.
> ---
> target/ppc/mmu-book3s-v3.h | 3 +++
> hw/ppc/spapr_hcall.c | 1 -
> target/ppc/mmu-book3s-v3.c | 2 --
> target/ppc/mmu-hash64.c | 1 -
> target/ppc/mmu-radix64.c | 1 -
> 5 files changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/target/ppc/mmu-book3s-v3.h b/target/ppc/mmu-book3s-v3.h
> index 12ec0054c207..4e59742d7eac 100644
> --- a/target/ppc/mmu-book3s-v3.h
> +++ b/target/ppc/mmu-book3s-v3.h
> @@ -22,6 +22,9 @@
>
> #ifndef CONFIG_USER_ONLY
>
> +#include "mmu-hash64.h"
> +#include "mmu-radix64.h"
> +
> /*
> * Partition table definitions
> */
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index b47241ace62a..2f64c69a6abf 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -9,7 +9,6 @@
> #include "helper_regs.h"
> #include "hw/ppc/spapr.h"
> #include "hw/ppc/spapr_cpu_core.h"
> -#include "mmu-hash64.h"
> #include "cpu-models.h"
> #include "trace.h"
> #include "kvm_ppc.h"
> diff --git a/target/ppc/mmu-book3s-v3.c b/target/ppc/mmu-book3s-v3.c
> index a174e7efc57c..ccbae3213cc1 100644
> --- a/target/ppc/mmu-book3s-v3.c
> +++ b/target/ppc/mmu-book3s-v3.c
> @@ -19,9 +19,7 @@
>
> #include "qemu/osdep.h"
> #include "cpu.h"
> -#include "mmu-hash64.h"
> #include "mmu-book3s-v3.h"
> -#include "mmu-radix64.h"
>
> int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
> int mmu_idx)
> diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
> index 1175b991d994..f6c822ef917b 100644
> --- a/target/ppc/mmu-hash64.c
> +++ b/target/ppc/mmu-hash64.c
> @@ -24,7 +24,6 @@
> #include "qemu/error-report.h"
> #include "sysemu/hw_accel.h"
> #include "kvm_ppc.h"
> -#include "mmu-hash64.h"
> #include "exec/log.h"
> #include "hw/hw.h"
> #include "mmu-book3s-v3.h"
> diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
> index ab76cbc83530..5881efeb8598 100644
> --- a/target/ppc/mmu-radix64.c
> +++ b/target/ppc/mmu-radix64.c
> @@ -25,7 +25,6 @@
> #include "sysemu/kvm.h"
> #include "kvm_ppc.h"
> #include "exec/log.h"
> -#include "mmu-radix64.h"
> #include "mmu-book3s-v3.h"
>
> static bool ppc_radix64_get_fully_qualified_addr(CPUPPCState *env, vaddr
> eaddr,
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-ppc] [Qemu-devel] [PATCH 02/12] target/ppci/mmu: Use LPCR:HR to chose radix vs. hash translation, (continued)
[Qemu-ppc] [PATCH 10/12] target/ppc: Rename PATB/PATBE -> PATE, Cédric Le Goater, 2019/02/15
[Qemu-ppc] [PATCH 03/12] target/ppc: Re-enable RMLS on POWER9 for virtual hypervisors, Cédric Le Goater, 2019/02/15
[Qemu-ppc] [PATCH 11/12] target/ppc: Support for POWER9 native hash, Cédric Le Goater, 2019/02/15
[Qemu-ppc] [PATCH 07/12] target/ppc: Add basic support for "new format" HPTE as found on POWER9, Cédric Le Goater, 2019/02/15
[Qemu-ppc] [PATCH 05/12] target/ppc: Cleanup 64-bit MMU includes, Cédric Le Goater, 2019/02/15
- Re: [Qemu-ppc] [PATCH 05/12] target/ppc: Cleanup 64-bit MMU includes,
David Gibson <=
[Qemu-ppc] [PATCH 08/12] target/ppc: Fix synchronization of mttcg with broadcast TLB flushes, Cédric Le Goater, 2019/02/15
[Qemu-ppc] [PATCH 12/12] target/ppc: Basic POWER9 bare-metal radix MMU support, Cédric Le Goater, 2019/02/15
[Qemu-ppc] [PATCH 09/12] target/ppc: Flush the TLB locally when the LPIDR is written, Cédric Le Goater, 2019/02/15
[Qemu-ppc] [PATCH 01/12] target/ppc/spapr: Set LPCR:HR when using Radix mode, Cédric Le Goater, 2019/02/15
[Qemu-ppc] [PATCH 04/12] target/ppc: Fix #include guard in mmu-book3s-v3.h, Cédric Le Goater, 2019/02/15
Re: [Qemu-ppc] [PATCH 00/12] ppc: add native hash and radix support for POWER9, David Gibson, 2019/02/19