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[PATCH v2 13/14] target/ppc: 405: Program exception cleanup
From: |
Fabiano Rosas |
Subject: |
[PATCH v2 13/14] target/ppc: 405: Program exception cleanup |
Date: |
Tue, 18 Jan 2022 15:44:47 -0300 |
The 405 Program Interrupt does not set SRR1 with any diagnostic bits,
just a clean copy of the MSR.
We're using the BookE Exception Syndrome Register which is different
from the 405.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
---
target/ppc/excp_helper.c | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 13674a102f..2efec6d13b 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -484,30 +484,14 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
env->error_code = 0;
return;
}
-
- /*
- * FP exceptions always have NIP pointing to the faulting
- * instruction, so always use store_next and claim we are
- * precise in the MSR.
- */
- msr |= 0x00100000;
- env->spr[SPR_BOOKE_ESR] = ESR_FP;
break;
case POWERPC_EXCP_INVAL:
trace_ppc_excp_inval(env->nip);
- msr |= 0x00080000;
- env->spr[SPR_BOOKE_ESR] = ESR_PIL;
break;
case POWERPC_EXCP_PRIV:
- msr |= 0x00040000;
- env->spr[SPR_BOOKE_ESR] = ESR_PPR;
- break;
case POWERPC_EXCP_TRAP:
- msr |= 0x00020000;
- env->spr[SPR_BOOKE_ESR] = ESR_PTR;
break;
default:
- /* Should never occur */
cpu_abort(cs, "Invalid program exception %d. Aborting\n",
env->error_code);
break;
--
2.33.1
Re: [PATCH v2 00/14] target/ppc: powerpc_excp improvements [40x] (3/n), Cédric Le Goater, 2022/01/20