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[PULL 44/60] ppc440_pcix: Don't use iomem for regs
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 44/60] ppc440_pcix: Don't use iomem for regs |
Date: |
Fri, 7 Jul 2023 08:30:52 -0300 |
From: BALATON Zoltan <balaton@eik.bme.hu>
The iomem memory region is better used for the PCI IO space but
currently used for registers. Stop using it for that to allow this to
be cleaned up in the next patch.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID:
<3def68f200edd4540393d6b3b03baabe15d649f2.1688586835.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/ppc/ppc440_pcix.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c
index f10f93c533..899558b055 100644
--- a/hw/ppc/ppc440_pcix.c
+++ b/hw/ppc/ppc440_pcix.c
@@ -64,6 +64,7 @@ struct PPC440PCIXState {
MemoryRegion container;
MemoryRegion iomem;
MemoryRegion busmem;
+ MemoryRegion regs;
};
#define PPC440_REG_BASE 0x80000
@@ -507,11 +508,11 @@ static void ppc440_pcix_realize(DeviceState *dev, Error
**errp)
h, "pci-conf-idx", 4);
memory_region_init_io(&h->data_mem, OBJECT(s), &pci_host_data_le_ops,
h, "pci-conf-data", 4);
- memory_region_init_io(&s->iomem, OBJECT(s), &pci_reg_ops, s,
- "pci.reg", PPC440_REG_SIZE);
+ memory_region_init_io(&s->regs, OBJECT(s), &pci_reg_ops, s, "pci-reg",
+ PPC440_REG_SIZE);
memory_region_add_subregion(&s->container, PCIC0_CFGADDR, &h->conf_mem);
memory_region_add_subregion(&s->container, PCIC0_CFGDATA, &h->data_mem);
- memory_region_add_subregion(&s->container, PPC440_REG_BASE, &s->iomem);
+ memory_region_add_subregion(&s->container, PPC440_REG_BASE, &s->regs);
sysbus_init_mmio(sbd, &s->container);
}
--
2.41.0
- [PULL 33/60] ppc/pnv: SMT support for powernv, (continued)
- [PULL 33/60] ppc/pnv: SMT support for powernv, Daniel Henrique Barboza, 2023/07/07
- [PULL 34/60] tests/avocado: Add powernv machine test script, Daniel Henrique Barboza, 2023/07/07
- [PULL 35/60] ppc440: Change ppc460ex_pcie_init() parameter type, Daniel Henrique Barboza, 2023/07/07
- [PULL 36/60] ppc440: Add cpu link property to PCIe controller model, Daniel Henrique Barboza, 2023/07/07
- [PULL 37/60] ppc440: Add a macro to shorten PCIe controller DCR registration, Daniel Henrique Barboza, 2023/07/07
- [PULL 38/60] ppc440: Rename parent field of PPC460EXPCIEState to match code style, Daniel Henrique Barboza, 2023/07/07
- [PULL 40/60] ppc440: Stop using system io region for PCIe buses, Daniel Henrique Barboza, 2023/07/07
- [PULL 41/60] ppc440: Add busnum property to PCIe controller model, Daniel Henrique Barboza, 2023/07/07
- [PULL 39/60] ppc440: Rename local variable in dcr_read_pcie(), Daniel Henrique Barboza, 2023/07/07
- [PULL 43/60] ppc/sam460ex: Remove address_space_mem local variable, Daniel Henrique Barboza, 2023/07/07
- [PULL 44/60] ppc440_pcix: Don't use iomem for regs,
Daniel Henrique Barboza <=
- [PULL 42/60] ppc440: Remove ppc460ex_pcie_init legacy init function, Daniel Henrique Barboza, 2023/07/07
- [PULL 45/60] ppc440_pcix: Stop using system io region for PCI bus, Daniel Henrique Barboza, 2023/07/07
- [PULL 46/60] ppc4xx_pci: Rename QOM type name define, Daniel Henrique Barboza, 2023/07/07
- [PULL 47/60] ppc4xx_pci: Add define for ppc4xx-host-bridge type name, Daniel Henrique Barboza, 2023/07/07
- [PULL 48/60] ppc440_pcix: Rename QOM type define abd move it to common header, Daniel Henrique Barboza, 2023/07/07
- [PULL 50/60] ppc/pnv: Set P10 core xscom region size to match hardware, Daniel Henrique Barboza, 2023/07/07
- [PULL 49/60] ppc/pnv: Log all unimp warnings with similar message, Daniel Henrique Barboza, 2023/07/07
- [PULL 51/60] tests/qtest: Add xscom tests for powernv10 machine, Daniel Henrique Barboza, 2023/07/07
- [PULL 52/60] target/ppc: Machine check on invalid real address access on POWER9/10, Daniel Henrique Barboza, 2023/07/07
- [PULL 53/60] target/ppc: Have 'kvm_ppc.h' include 'sysemu/kvm.h', Daniel Henrique Barboza, 2023/07/07