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[PULL 18/47] ppc/spapr: change pseries machine default to POWER10 CPU
From: |
Nicholas Piggin |
Subject: |
[PULL 18/47] ppc/spapr: change pseries machine default to POWER10 CPU |
Date: |
Sat, 24 Feb 2024 01:41:37 +1000 |
POWER10 is the latest pseries CPU.
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/ppc/spapr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 0028ce0b67..b442d18317 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -4664,7 +4664,7 @@ static void spapr_machine_class_init(ObjectClass *oc,
void *data)
smc->dr_lmb_enabled = true;
smc->update_dt_enabled = true;
- mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.2");
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v2.0");
mc->has_hotpluggable_cpus = true;
mc->nvdimm_supported = true;
smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
--
2.42.0
- [PULL 11/47] target/ppc: Rename registers to match ISA, (continued)
- [PULL 11/47] target/ppc: Rename registers to match ISA, Nicholas Piggin, 2024/02/23
- [PULL 17/47] ppc/spapr: Initialize max_cpus limit to SPAPR_IRQ_NR_IPIS., Nicholas Piggin, 2024/02/23
- [PULL 19/47] spapr: Tag pseries-2.1 - 2.11 machines as deprecated, Nicholas Piggin, 2024/02/23
- [PULL 29/47] ppc/pnv: Test pnv i2c master and connected devices, Nicholas Piggin, 2024/02/23
- [PULL 32/47] hw/ppc: N1 chiplet wiring, Nicholas Piggin, 2024/02/23
- [PULL 35/47] target/ppc: Improve timebase register defines naming, Nicholas Piggin, 2024/02/23
- [PULL 33/47] target/ppc: Update gdbstub to read SPR's CFAR, DEC, HDEC, TB-L/U, Nicholas Piggin, 2024/02/23
- [PULL 37/47] ppc/pnv: Add POWER9/10 chiptod model, Nicholas Piggin, 2024/02/23
- [PULL 05/47] tests/avocado: ppc add powernv10 boot_linux_console test, Nicholas Piggin, 2024/02/23
- [PULL 16/47] ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for CPU IPIs., Nicholas Piggin, 2024/02/23
- [PULL 18/47] ppc/spapr: change pseries machine default to POWER10 CPU,
Nicholas Piggin <=
- [PULL 25/47] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control, Nicholas Piggin, 2024/02/23
- [PULL 26/47] ppc/pnv: Use resettable interface to reset child I2C buses, Nicholas Piggin, 2024/02/23
- [PULL 28/47] ppc/pnv: Add a pca9554 I2C device to powernv10-rainier, Nicholas Piggin, 2024/02/23
- [PULL 30/47] hw/ppc: Add pnv nest pervasive common chiplet model, Nicholas Piggin, 2024/02/23
- [PULL 43/47] target/ppc: Factor out 4xx ppcemb_tlb_t flushing, Nicholas Piggin, 2024/02/23
- [PULL 42/47] target/ppc: Fix 440 tlbwe TLB invalidation gaps, Nicholas Piggin, 2024/02/23
- [PULL 39/47] ppc/pnv: Implement the ChipTOD to Core transfer, Nicholas Piggin, 2024/02/23
- [PULL 45/47] target/ppc: 4xx optimise tlbwe_lo TLB flushing, Nicholas Piggin, 2024/02/23
- [PULL 31/47] hw/ppc: Add N1 chiplet model, Nicholas Piggin, 2024/02/23
- [PULL 41/47] target/ppc: Add SMT support to time facilities, Nicholas Piggin, 2024/02/23