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Re: [avr-gcc-list] efficiency of assigning bits
From: |
Daniel O'Connor |
Subject: |
Re: [avr-gcc-list] efficiency of assigning bits |
Date: |
Mon, 14 Mar 2005 22:20:04 +1030 |
User-agent: |
KMail/1.7.92 |
On Mon, 14 Mar 2005 20:29, Jamie Morken wrote:
> What does that work out to in assembly? A cbi/sbi assembly instruction is
> 2 clock cycles. I still don't understand why these instructions would be
> taken out of winavr, they obviously are useful for them to have been
> included as opcodes in the AVR! :)
The compiler still generates those instructions..
The PORTA &= 0x1 type of construct is portable to other compilers and
architectures without any changes.
As you say, if it really bothers you, you can use inline assembly.
--
Daniel O'Connor software and network engineer
for Genesis Software - http://www.gsoft.com.au
"The nice thing about standards is that there
are so many of them to choose from."
-- Andrew Tanenbaum
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- Re: [avr-gcc-list] efficiency of assigning bits, (continued)
- Re: [avr-gcc-list] efficiency of assigning bits, Parthasaradhi Nayani, 2005/03/13
- Re: [avr-gcc-list] efficiency of assigning bits, Jamie Morken, 2005/03/14
- Re: [avr-gcc-list] efficiency of assigning bits, E. Weddington, 2005/03/14
- Re: [avr-gcc-list] efficiency of assigning bits, E. Weddington, 2005/03/14
- Re: [avr-gcc-list] efficiency of assigning bits, E. Weddington, 2005/03/14
- Re: [avr-gcc-list] efficiency of assigning bits, Jamie Morken, 2005/03/17