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Re: sh3-dsp instruction "movs.l Ds,@-As" assembles wrong
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From: |
Nick Clifton |
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Subject: |
Re: sh3-dsp instruction "movs.l Ds,@-As" assembles wrong |
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Date: |
09 Oct 2001 13:20:49 +0100 |
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User-agent: |
Gnus/5.0808 (Gnus v5.8.8) Emacs/20.7 |
Hi Greg,
> I have found a problem with gas assembling wrong the
> sh3 (dsp) instruction "movs.l Ds,@-As".
>
> For example:
>
> movs.l a1, @-r2
>
> assembles to:
>
> 164e: 5c f6 movs.l a1,@-r6
>
> (as dumped by objdump).
>
> But the 0xf65c is the wrong opcode. It should be 0xf653.
Indeed it should.
> (Objdump even gets the dis-assemble wrong too :-)
This is a separate bug, but yes, this is also wrong.
> But I can see from the CVS at http://sources.redhat.com/binutils/
> that the file opcodes/sh-opc.h still has the opcodes wrong.
> I think some of the other "movs" opcodes are wrong here too.
They are. Here is a patch to fix this problem. I will be checking it
into the sources shortly. I am also going to add a test tot he GAS
testsuite to check these instructions and to make sure that they are
assembled and disassembled correctly in the future. This is the
second part of the patch below.
Cheers
Nick
opcodes
2001-10-09 Nick Clifton <address@hidden>
* sh-opc.h: Fix encoding of least significant nibble of the
DSP single data transfer instructions.
* sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP
instructions.
gas
2001-10-09 Nick Clifton <address@hidden>
* sh/basic.exp: Add dsp dump test.
* sh/dsp/d: New file: Expected output of disassembly of dsp.s
* sh/dsp.s: New file: Test assembly source of DSP single data
transfer instructions.
Index: opcodes/sh-opc.h
===================================================================
RCS file: /cvs/src/src/opcodes/sh-opc.h,v
retrieving revision 1.11
diff -p -r1.11 sh-opc.h
*** sh-opc.h 2001/06/09 22:42:30 1.11
--- sh-opc.h 2001/10/09 12:14:50
*************** sh_opcode_info sh_table[] = {
*** 620,652 ****
/* 111101nnmmmm0000 movs.w @-<REG_N>,<DSP_REG_M> */
{"movs.w",{A_DEC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_0}, arch_sh_dsp_up},
! /* 111101nnmmmm0001 movs.w @<REG_N>,<DSP_REG_M> */
{"movs.w",{A_IND_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_1}, arch_sh_dsp_up},
! /* 111101nnmmmm0010 movs.w @<REG_N>+,<DSP_REG_M> */
{"movs.w",{A_INC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_2}, arch_sh_dsp_up},
! /* 111101nnmmmm0011 movs.w @<REG_N>+r8,<DSP_REG_M> */
{"movs.w",{A_PMOD_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_3}, arch_sh_dsp_up},
! /* 111101nnmmmm0100 movs.w <DSP_REG_M>,@-<REG_N> */
{"movs.w",{DSP_REG_M,A_DEC_N},{HEX_F,SDT_REG_N,REG_M,HEX_4}, arch_sh_dsp_up},
/* 111101nnmmmm0101 movs.w <DSP_REG_M>,@<REG_N> */
{"movs.w",{DSP_REG_M,A_IND_N},{HEX_F,SDT_REG_N,REG_M,HEX_5}, arch_sh_dsp_up},
! /* 111101nnmmmm0110 movs.w <DSP_REG_M>,@<REG_N>+ */
{"movs.w",{DSP_REG_M,A_INC_N},{HEX_F,SDT_REG_N,REG_M,HEX_6}, arch_sh_dsp_up},
! /* 111101nnmmmm0111 movs.w <DSP_REG_M>,@<REG_N>+r8 */
{"movs.w",{DSP_REG_M,A_PMOD_N},{HEX_F,SDT_REG_N,REG_M,HEX_7}, arch_sh_dsp_up},
! /* 111101nnmmmm1000 movs.l @-<REG_N>,<DSP_REG_M> */
{"movs.l",{A_DEC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_8}, arch_sh_dsp_up},
! /* 111101nnmmmm1001 movs.l @<REG_N>,<DSP_REG_M> */
{"movs.l",{A_IND_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_9}, arch_sh_dsp_up},
/* 111101nnmmmm1010 movs.l @<REG_N>+,<DSP_REG_M> */
{"movs.l",{A_INC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_A}, arch_sh_dsp_up},
! /* 111101nnmmmm1011 movs.l @<REG_N>+r8,<DSP_REG_M> */
{"movs.l",{A_PMOD_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_B}, arch_sh_dsp_up},
! /* 111101nnmmmm1100 movs.l <DSP_REG_M>,@-<REG_N> */
{"movs.l",{DSP_REG_M,A_DEC_N},{HEX_F,SDT_REG_N,REG_M,HEX_C}, arch_sh_dsp_up},
! /* 111101nnmmmm1101 movs.l <DSP_REG_M>,@<REG_N> */
{"movs.l",{DSP_REG_M,A_IND_N},{HEX_F,SDT_REG_N,REG_M,HEX_D}, arch_sh_dsp_up},
! /* 111101nnmmmm1110 movs.l <DSP_REG_M>,@<REG_N>+ */
{"movs.l",{DSP_REG_M,A_INC_N},{HEX_F,SDT_REG_N,REG_M,HEX_E}, arch_sh_dsp_up},
/* 111101nnmmmm1111 movs.l <DSP_REG_M>,@<REG_N>+r8 */
{"movs.l",{DSP_REG_M,A_PMOD_N},{HEX_F,SDT_REG_N,REG_M,HEX_F}, arch_sh_dsp_up},
--- 620,652 ----
/* 111101nnmmmm0000 movs.w @-<REG_N>,<DSP_REG_M> */
{"movs.w",{A_DEC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_0}, arch_sh_dsp_up},
! /* 111101nnmmmm0001 movs.w @<REG_N>,<DSP_REG_M> */
{"movs.w",{A_IND_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_4}, arch_sh_dsp_up},
! /* 111101nnmmmm0010 movs.w @<REG_N>+,<DSP_REG_M> */
{"movs.w",{A_INC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_8}, arch_sh_dsp_up},
! /* 111101nnmmmm0011 movs.w @<REG_N>+r8,<DSP_REG_M> */
{"movs.w",{A_PMOD_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_C}, arch_sh_dsp_up},
! /* 111101nnmmmm0100 movs.w <DSP_REG_M>,@-<REG_N> */
{"movs.w",{DSP_REG_M,A_DEC_N},{HEX_F,SDT_REG_N,REG_M,HEX_1}, arch_sh_dsp_up},
/* 111101nnmmmm0101 movs.w <DSP_REG_M>,@<REG_N> */
{"movs.w",{DSP_REG_M,A_IND_N},{HEX_F,SDT_REG_N,REG_M,HEX_5}, arch_sh_dsp_up},
! /* 111101nnmmmm0110 movs.w <DSP_REG_M>,@<REG_N>+ */
{"movs.w",{DSP_REG_M,A_INC_N},{HEX_F,SDT_REG_N,REG_M,HEX_9}, arch_sh_dsp_up},
! /* 111101nnmmmm0111 movs.w <DSP_REG_M>,@<REG_N>+r8 */
{"movs.w",{DSP_REG_M,A_PMOD_N},{HEX_F,SDT_REG_N,REG_M,HEX_D}, arch_sh_dsp_up},
! /* 111101nnmmmm1000 movs.l @-<REG_N>,<DSP_REG_M> */
{"movs.l",{A_DEC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_2}, arch_sh_dsp_up},
! /* 111101nnmmmm1001 movs.l @<REG_N>,<DSP_REG_M> */
{"movs.l",{A_IND_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_6}, arch_sh_dsp_up},
/* 111101nnmmmm1010 movs.l @<REG_N>+,<DSP_REG_M> */
{"movs.l",{A_INC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_A}, arch_sh_dsp_up},
! /* 111101nnmmmm1011 movs.l @<REG_N>+r8,<DSP_REG_M> */
{"movs.l",{A_PMOD_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_E}, arch_sh_dsp_up},
! /* 111101nnmmmm1100 movs.l <DSP_REG_M>,@-<REG_N> */
{"movs.l",{DSP_REG_M,A_DEC_N},{HEX_F,SDT_REG_N,REG_M,HEX_3}, arch_sh_dsp_up},
! /* 111101nnmmmm1101 movs.l <DSP_REG_M>,@<REG_N> */
{"movs.l",{DSP_REG_M,A_IND_N},{HEX_F,SDT_REG_N,REG_M,HEX_7}, arch_sh_dsp_up},
! /* 111101nnmmmm1110 movs.l <DSP_REG_M>,@<REG_N>+ */
{"movs.l",{DSP_REG_M,A_INC_N},{HEX_F,SDT_REG_N,REG_M,HEX_B}, arch_sh_dsp_up},
/* 111101nnmmmm1111 movs.l <DSP_REG_M>,@<REG_N>+r8 */
{"movs.l",{DSP_REG_M,A_PMOD_N},{HEX_F,SDT_REG_N,REG_M,HEX_F}, arch_sh_dsp_up},
Index: opcodes/sh-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/sh-dis.c,v
retrieving revision 1.8
diff -p -r1.8 sh-dis.c
*** sh-dis.c 2001/08/26 11:47:38 1.8
--- sh-dis.c 2001/10/09 12:14:51
*************** print_insn_shx (memaddr, info)
*** 465,471 ****
if ((rn & 0xc) != 4)
goto fail;
rn = rn & 0x3;
! rn |= (rn & 2) << 1;
break;
case PPI:
case REPEAT:
--- 465,471 ----
if ((rn & 0xc) != 4)
goto fail;
rn = rn & 0x3;
! rn |= (!(rn & 2)) << 2;
break;
case PPI:
case REPEAT:
Index: gas/testsuite/gas/sh/basic.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/sh/basic.exp,v
retrieving revision 1.1.1.1
diff -p -r1.1.1.1 basic.exp
*** basic.exp 1999/05/03 07:28:52 1.1.1.1
--- basic.exp 2001/10/09 12:20:35
*************** proc do_fp {} {
*** 83,86 ****
--- 83,88 ----
if [istarget sh*-*-*] then {
# Test the basic instruction parser.
do_fp
+ # Test DSP instructions
+ run_dump_test "dsp"
}
Index: gas/testsuite/gas/sh/dsp.d
===================================================================
RCS file: dsp.d
diff -N dsp.d
*** /dev/null Tue May 5 13:32:27 1998
--- dsp.d Tue Oct 9 05:20:35 2001
***************
*** 0 ****
--- 1,24 ----
+ #objdump: -dr --prefix-addresses --show-raw-insn
+ #name: SH DSP basic instructions
+ #as: -dsp
+ # Test the SH DSP instructions:
+
+ .*: +file format .*sh.*
+
+ Disassembly of section .text:
+ 0+000 <[^>]*> f6 80 [ ]*movs.w @-r2,x0
+ 0+002 <[^>]*> f7 94 [ ]*movs.w @r3,x1
+ 0+004 <[^>]*> f4 a8 [ ]*movs.w @r4\+,y0
+ 0+006 <[^>]*> f5 b8 [ ]*movs.w @r5\+,y1
+ 0+008 <[^>]*> f5 c1 [ ]*movs.w m0,@-r5
+ 0+00a <[^>]*> f4 e5 [ ]*movs.w m1,@r4
+ 0+00c <[^>]*> f7 79 [ ]*movs.w a0,@r3\+
+ 0+00e <[^>]*> f6 59 [ ]*movs.w a1,@r2\+
+ 0+010 <[^>]*> f6 f2 [ ]*movs.l @-r2,a0g
+ 0+012 <[^>]*> f7 d6 [ ]*movs.l @r3,a1g
+ 0+014 <[^>]*> f4 8a [ ]*movs.l @r4\+,x0
+ 0+016 <[^>]*> f5 9a [ ]*movs.l @r5\+,x1
+ 0+018 <[^>]*> f5 a3 [ ]*movs.l y0,@-r5
+ 0+01a <[^>]*> f4 b7 [ ]*movs.l y1,@r4
+ 0+01c <[^>]*> f7 cb [ ]*movs.l m0,@r3\+
+ 0+01e <[^>]*> f6 eb [ ]*movs.l m1,@r2\+
Index: gas/testsuite/gas/sh/dsp.s
===================================================================
RCS file: dsp.s
diff -N dsp.s
*** /dev/null Tue May 5 13:32:27 1998
--- dsp.s Tue Oct 9 05:20:35 2001
***************
*** 0 ****
--- 1,24 ----
+ # Test file for ARM/GAS -- basic instructions
+
+ .text
+ .align
+ .globl dsp_tests
+ dsp_tests:
+ movs.w @-r2, x0
+ movs.w @r3, x1
+ movs.w @r4+, y0
+ movs.w @r5+r8, y1
+ movs.w m0, @-r5
+ movs.w m1, @r4
+ movs.w a0, @r3+
+ movs.w a1, @r2+r8
+
+ movs.l @-r2, a0g
+ movs.l @r3, a1g
+ movs.l @r4+, x0
+ movs.l @r5+r8, x1
+ movs.l y0, @-r5
+ movs.l y1, @r4
+ movs.l m0, @r3+
+ movs.l m1, @r2+r8
+
\ No newline at end of file
- Re: sh3-dsp instruction "movs.l Ds,@-As" assembles wrong,
Nick Clifton <=