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[PATCH 0/6 gnumach] Preparation for parallel SMP init


From: Damien Zammit
Subject: [PATCH 0/6 gnumach] Preparation for parallel SMP init
Date: Mon, 09 Dec 2024 12:17:15 +0000

Hi,

This patchset consists of 6 patches that have been tested **not** to break
both smp and non-smp systems, but get us closer to having smp working fully.

The rationale for going with parallel init for smp is that APICs are not
individually addressible for more than 8 cpus (in logical mode) or 16 cpus
(in physical mode), unless it is a Pentium 4 or Xeon processor, where you may
address 256 individual APIC ids.  Also, if the physical apic id > 0xf, you can't
address it at all with physical mode on modern non-Xeon cpus.

Therefore, to support INIT and STARTUP on > 8 cpus, we need to use
a physical IPI that broadcasts to all apics except BSP itself.
I think this is the only way to address all the cpus to wake up.
So, we need parallel smp init.

I am working on a branch to get this working but currently the remainder
of my patches hang the system occasionally, so I have not included any here.

Damien






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