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Unportable makefile example in "Makefile Convention" section


From: Kang-Che Sung
Subject: Unportable makefile example in "Makefile Convention" section
Date: Mon, 6 May 2024 23:27:25 +0800

Hi, maintainers of GNU Coding Standard document,

In section "7.2.1 General Conventions for Makefiles" of the document,
there's an example about VPATH and the `$<` variable...

> A Makefile target like
>
> foo.o : bar.c
> <tab> $(CC) -I. -I$(srcdir) $(CFLAGS) -c bar.c -o foo.o
>
> should instead be written as
>
> foo.o : bar.c
> <tab> $(CC) -I. -I$(srcdir) $(CFLAGS) -c $< -o $@

But it has been noted in the paragraph just above that...

> Many versions of make set '$<' only in implicit rules.

(the same thing is also mentioned in Autoconf manual [reference 1])

So why is `$<` even suggested here in the example when it's unportable?

I think the example should be this instead:

foo.o : bar.c
<tab> $(CC) -I. -I$(srcdir) $(CFLAGS) -c $(srcdir)/bar.c -o $@

Or maybe use this example, which is an inference rule in which the
variable `$<` would surely work:

.c.o:
<tab> $(CC) -I. -I$(srcdir) $(CFLAGS) -c $< -o $@

Would you clarify or correct the document?

Thank you.


[1]: 
(https://www.gnu.org/savannah-checkouts/gnu/autoconf/manual/autoconf-2.72/html_node/_0024_003c-in-Ordinary-Make-Rules.html)



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