Re: Make with another make as a prerequisite

[crjjrc]

On Mar 2, 2:13 pm, Henrik Carlqvist <Henrik.Carlqv...@deadspam.com>
wrote:

> I have another solution, but as you already have found a solution which
> works you might not want to use my way:
>
> -8<---------------------------------
> all: myprog
>
> myprog: mysrc.c ../lib/mylib.a
>         gcc -o $@ $^
>
> ../lib/mylib.a: FORCE
>         cd ../lib && $(MAKE)
>
> # Used to force some rules to always be compiled
> FORCE: ;
> -8<---------------------------------
>
> The above Makefile doesn't know anything about how mylib.a is made.
> Instead it allways calls another makefile who has the responsibility to
> update mylib.a if needed.
>
> Only if mysrc.c or mylib.a has been updated myprog will be rebuilt.

I like your solution much better actually, because my "var = $
(shell ...)" always gets executed, even if the target is clean.

I'm not sure I quite understand why it works though.  The prerequisite
is always checked for out-of-date in and of itself, and not if any of
the prerequisite's prerequisites cause its commands to be run?  That
is, even though mylib.a always has its commands run, only when the
file's modification time (or mysrc.c's) changes is myprog rebuilt?

Thanks for the tip!

- Chris