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| From: | parag |
| Subject: | override make file variables |
| Date: | Tue, 15 Apr 2008 23:49:43 -0700 (PDT) |
| User-agent: | G2/1.0 |
hi all, i have a makefile cat makefil CPP=cc . . . . Now I want to override this CPP from the invocation line for the makefile. Is it possible to do the same . please help me
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