GNU Make Question about string replace in dependency list

[DeMarco, Paul]

I am having trouble with my makefile rebuilding cpp files when it shouldn't

 

I absolutly could not get separate directory compilation working: be in the object dir with source in another dir, it's for cross platform dev.

 

So I fell back to old faithful:

node.o: $(SRC)/node.cpp $(INCL)/node.h

    $(CC) $(CPPFLAGS) $(SRC)/node.cpp

 

but I realized that there would be a lot of maintenance since I couldn't get the suffix rules to work properly I decided to save myself some work by using this:

 

node.o: $(SRC)/$(@:.o=.cpp) $(INCL)/$(@:.cpp=.h)
 $(CC) $(CPPFLAGS) $(SRC)/$(@:.o=.cpp)

Unfortunatly it rebuilds way too often when it shouldn't.  Is this an acceptable method of constructing a dependancy list?

 

    -- Paul