Re: How to get the current make target

[Yakov Lerner]

Yanghui Bian wrote:
> Generally I could get the make target from "makecmdgoals" provided by
> GNU make.
> But sometimes people will invoke make like below:
> make target1 target2 target3
> ... is there any way to get the target which is under
> processing?  

I wrote earlier about one solution.

Here's another workaround/solution:

(1) Rename your 'Makefile' into 'Makefile.1"

(2) As a "Makefile", use included generic 'stub'
which 'translates' 0,1, or n targets of 'make' command
into equivalent sequence of calls to Makefile.1 with exactly
one target in the $(MAKECMDGOALS) on each invocation of Makefile.1

(3) Customize the 'DEFAULT_TARGET = all' line in the 'stub' Makefile

(4) add this comment to the Makefile.1

  # this 'Makefile.1' is called via special 'stub' Makefile
  # which ensures that $(MAKECMDGOALS) contains exactly 1 target

Now inside Makefile.1, $(MAKECMDOALS) will always contain
single word, the current toplevel target.

Jacob Lerner

------------------- begin 'stub' Makefile
# Turn 0,1, or more targets on command-line into
# equivalent series of calls to Makefile.real, each call with
# exactly one target on command line of Makefile.real

# define DEFAULT_TARGET as first target defined in Makefile.1
DEFAULT_TARGET = all

ifeq (,$(MAKECMDGOALS))

# zero targets on command line
$(DEFAULT_TARGET):
        $(MAKE) -f Makefile.1 $(DEFAULT_TARGET)
else

# 1 or more targets on command line
%:
        for goal in $(MAKECMDGOALS); do   \
                $(MAKE) -f Makefile.1 $$goal || exit 1; \
        done
endif
---------------- end 'stub' Makefile

# Turn 0,1, or more targets on command-line into 
# equivalent series of calls to Makefile.real, each call with
# exactly one target on command line of Makefile.real

# define DEFAULT_TARGET as first target defined in Makefile.1
DEFAULT_TARGET = all

ifeq (,$(MAKECMDGOALS))

# zero targets on command line
$(DEFAULT_TARGET):
        $(MAKE) -f Makefile.1 $(DEFAULT_TARGET)
else

# 1 or more targets on command line
%:
        for goal in $(MAKECMDGOALS); do   \
                $(MAKE) -f Makefile.1 $$goal || exit 1; \
        done
endif