Re: Different compilation based on filename

[Paul Smith]

On Thu, 2009-09-10 at 14:50 +0200, Christian Rogsch wrote:
> I have the following problem with a makefile: I want to compile files 
> with different compiler flags, based on the name of the file.

There are a number of ways to do this.  One is target-specific
variables, as Cheng suggested.

Another is constructed variable names.  Variable names in make can
consist of other variables.  So you could do something like this:

        foo.o_CFLAGS = -g

        %.o : %.c
                $(CC) $(CFLAGS) $(address@hidden) -o $@ -c $<

The $(address@hidden) (or, equivalently, $($(@)_CFLAGS)) expands to the value
contained in the variable named by concatenating the target ($@) with
the string _CFLAGS.

Personally I find this method the most aesthetically pleasing, mainly
because in my complex make environments I like to have all the "user
visible" makefile purely data-driven: they simply declare variables but
never need to declare rules.  The rules are all created in some deeply
magical common makefiles set up for the project.


The final way to do it is with $(eval ...) but this is overkill for this
problem, 99% of the time.

-- 
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