Escape rules for target name and dependency list

[Allan Odgaard]

I am generating a Makefile from a script so I need to handle proepr  
escaping of special characters (my files have lots of these).

By experimentation I found that in the target I need to escape: » : 
%#*;=$:« and in the dependencies: » \#*[|;=$:«. I may have missed some  
and maybe some are not necessary.

Anyway, the problem is that not all charactes (from my set) can  
actually be escaped. In particular ;, =, and : are problematic. I  
managed to escape the first two using variables like:

    semi-colon = \;
    foo$(semi-colon)bar.o: foo$(semi-colon)bar.c
        …

This however does not work for the colon in the dependency list. The  
best solution I found was replacing it with a shell wildcard:

    foo\:bar.o: foo?bar.c
        …

While theoretically fragile, my main problem with this is that it only  
works when the dependency already exists, e.g. this fails:

    foo\:bar.o: foo?bar.s
        …

    foo\:bar.s: foo?bar.c
        …

This is where I decided to seek professional help ;)