Re: Why don't more makefiles use rules like this: %.d %.o: %.c

[Philip Guenther]

On Wed, Nov 11, 2009 at 7:21 PM, John Fisher <address@hidden> wrote:
> I do not want to run the compiler twice or have a separate make depend
> target. The pattern rule exactly matches what the compiler is doing: from a
> .c file create a .d and .o at the same time.

It's harmful because make will try to build dependency files just
because they're being included by the makefile, whether or not the
matching .o file itself is actually needed by this particular make
run.  The result is that every make invocation brings up to date all
the .o files, regardless of the specified target list.  Unnecessary
work that I may have explicitly been trying to avoid == harmful.

(What happens if some of the files are in the middle of being hacked
on and can't be compiled yet?  "Sorry, *all* your files must have
valid syntax before you can compile any of them"?!)


> A list of .d files is calculated and make includes them. If they are not
> there this forces make to create the .d files.

You don't need to specify .d files as targets in order to generate
them, nor do you need to run the compiler twice to do so (the -MMD
takes care of that, of course).


> What is your alternative? How can what I suggested be harmful?

Please read the "Advanced Auto-Dependencies" section at this link
    http://make.paulandlesley.org/autodep.html#advanced

to see why forcing make to create .d files is unnecessary.


Philip Guenther