Re: How to expand computed variable names within for script command?

[Larry Evans]

On 07/27/2015 05:44 PM, Larry Evans wrote:
[snip]
> 
> The attached Makefile summarizes methods tried and the reason
> they failed or succeeded.  The last method, the one with
> target=compiles.def, uses define..endef and succeeds.
> 
> -regards,
> Larry

Further simplification is gotten by avoiding phony targets,
compile.$(1), in define..endef:

--{--cut here--
COMPILE.gcc=g++ -c
COMPILE.clang=clang -c
MAIN=test
COMPILERS=gcc clang

#The following does work by duplicating code
#for each compiler using define...endef:
define COMPILE.MAIN
$(MAIN).$(1).o: $(MAIN).cpp
        $$(COMPILE.$(1)) -c $(MAIN).cpp -o $$@
endef

$(foreach compiler, $(COMPILERS),$(eval $(call COMPILE.MAIN,$(compiler))))

compiles.def: $(COMPILERS:%=$(MAIN).%.o)
--}--cut here--