help-make
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: Simulating $(MAKE) FOO=bar without forking make?


From: Sébastien Hinderer
Subject: Re: Simulating $(MAKE) FOO=bar without forking make?
Date: Thu, 11 May 2017 16:01:41 +0200

Dear Dagobert,

Many thanks for your prompt and helpful response!

Dagobert Michelsen (2017/05/10 15:51 +0200):
> Hi Sebastian,
> 
> Am 10.05.2017 um 15:46 schrieb Sébastien Hinderer <address@hidden>:
> > One of the things I do not really know how to deal with is that the main
> > Makefile sometimes does things like
> > ratget1:
> >         $(MAKE) -C dir FOO=bar
> > 
> > ...
> > 
> > target2:
> >        $(MAKE) -C dir FOO=baz
> 
> Does this solve your issue?
> 
> ratget1: FOO=bar
> ratget1: dirrule
> 
> target2: FOO=baz
> target2: dirrule
> 
> dirrule:
>       (stuff from Makefile in dir)

(sorry for the spelling mistakes...)

Yeah, if not the solution itself, target-specific variables are probably
at least one step towards it.

Your suggestion makes me realise that I perhaps oversimplified the
problem, in the sense that the recipes for target1 and target2 contain
several commands, something like this:

target1:
        cmd1a
        $(MAKE) -C dir FOO=bar
        cmd1b 

...
 
target2:
        cmd2a
        $(MAKE) -C dir FOO=baz
        cmd2b
 
If FOO is made target-specific, its definition will also become visible
to cmd1a, cmd1b, cmd2a and cmd2b and this may not be suitable.

If there is no way to avoid this, I guess I wil(l have to make sure
that, although the definition of FOO will be visible for the other
commands, it won't affect them.

Sébastien.



reply via email to

[Prev in Thread] Current Thread [Next in Thread]