Evaluating a variable only once after a recipe has run

[R. Diez]

Hi all:

I am investigating the OpenWrt build system, which is a big, complex makefile.

I recently came across the following definition in this file:

https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=toolchain/musl/Makefile;h=2b9312bcbf123c03cf8947c52044557e27377e79;hb=HEAD

MUSL_MAKEOPTS = -C $(HOST_BUILD_DIR) \
         DESTDIR="$(TOOLCHAIN_DIR)/" \
         LIBCC="$(subst libgcc.a,libgcc_initial.a,$(shell $(TARGET_CC) 
-print-libgcc-file-name))"

Note the call to $(shell ...) every time a compilation process that uses those compilation flags is started. In this case, it 's not that bad, because 
those flags are only used once to run another GNU Make instance, but in some other compilation scenarios that can be very inefficient.

You would normally use MUSL_MAKEOPTS := (simply expanded variable) instead of just "=" (recursively expanded variable), in order to evaluate that 
variable only once. The trouble is, the cross-compiler (TARGET_CC) that this variable wants to run is only available after a certain makefile recipe 
has executed. Even if it were available, you would not want to run expensive shell commands to define a variable that is actually never used if the 
user did not specify a makefile target that needs it.

I will rephrase the question just in case it is not clear. I want GNU Make to run recipe A, and then use the result of recipe A to compute the value 
of a makefile variable, but only once. Other recipes that follow should use that value without evaluating the variable definition again.

It is kind of the reverse of "Target-specific Variable Values". A recipe 
defines a value that is valid for all other dependants that run afterwards.

Is that possible with GNU Make?

If not, what is the best way to handle the situation above?

Thanks in advance,
  rdiez