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Re: [Qemu-devel] [PATCH 2/5] softmmu templates: optionally pass CPUState


From: malc
Subject: Re: [Qemu-devel] [PATCH 2/5] softmmu templates: optionally pass CPUState to memory access functions
Date: Fri, 24 Aug 2012 20:26:11 +0400 (MSK)
User-agent: Alpine 2.00 (LNX 1167 2008-08-23)

On Fri, 24 Aug 2012, Andreas F?rber wrote:

> Am 24.08.2012 17:35, schrieb malc:
> > On Fri, 24 Aug 2012, malc wrote:
> > 
> >> On Fri, 24 Aug 2012, Aurelien Jarno wrote:
> >>
> >>> On Sun, Mar 11, 2012 at 10:24:03PM +0000, Blue Swirl wrote:
> > 
> > [..snip..]
> > 
> >>> - On 32 bit hosts, which usually need register alignments for 64-bit
> >>>   values (at least on arm and mips), given AREG0 is a 32-bit value this
> >>             ditto ppc32, erm.. with sysv abi that is
> 
> ...which have been fixed in the v1.1 release cycle. You can take a look
> at tcg/ppc/ for how we've fixed that with alignment macros and variable.

You are replying to the wrong person methinks.

> 
> Not opposed to changing the argument order, but given that we're inches
> away from v1.2 (in Hard Freeze), it might be better to first get AREG0
> as first argument working for your favorite hosts as a bugfix and then
> do any larger optimization for v1.3.
> 
> Regards,
> Andreas
> 
> 

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