[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 028/118] target-ppc: Introduce Decoder Macros for DFP
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 028/118] target-ppc: Introduce Decoder Macros for DFP |
Date: |
Wed, 4 Jun 2014 14:43:29 +0200 |
From: Tom Musta <address@hidden>
Add decoder macros for the various Decimal Floating Point
instruction forms. Illegal instruction masks are used to not only
guard against reserved instruction field use, but also to catch
illegal quad word forms that use odd-numbered floating point registers.
Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 109 +++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 109 insertions(+)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 7383c8a..2953dd3 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11175,6 +11175,115 @@ GEN_XXSEL_ROW(0x1F)
GEN_XX3FORM_DM(xxpermdi, 0x08, 0x01),
+#undef GEN_DFP_T_A_B_Rc
+#undef GEN_DFP_BF_A_B
+#undef GEN_DFP_BF_A_DCM
+#undef GEN_DFP_T_B_U32_U32_Rc
+#undef GEN_DFP_T_A_B_I32_Rc
+#undef GEN_DFP_T_B_Rc
+#undef GEN_DFP_T_FPR_I32_Rc
+
+#define _GEN_DFP_LONG(name, op1, op2, mask) \
+GEN_HANDLER_E(name, 0x3B, op1, op2, mask, PPC_NONE, PPC2_DFP)
+
+#define _GEN_DFP_LONGx2(name, op1, op2, mask) \
+GEN_HANDLER_E(name, 0x3B, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \
+GEN_HANDLER_E(name, 0x3B, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP)
+
+#define _GEN_DFP_LONGx4(name, op1, op2, mask) \
+GEN_HANDLER_E(name, 0x3B, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \
+GEN_HANDLER_E(name, 0x3B, op1, 0x08 | op2, mask, PPC_NONE, PPC2_DFP), \
+GEN_HANDLER_E(name, 0x3B, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP), \
+GEN_HANDLER_E(name, 0x3B, op1, 0x18 | op2, mask, PPC_NONE, PPC2_DFP)
+
+#define _GEN_DFP_QUAD(name, op1, op2, mask) \
+GEN_HANDLER_E(name, 0x3F, op1, op2, mask, PPC_NONE, PPC2_DFP)
+
+#define _GEN_DFP_QUADx2(name, op1, op2, mask) \
+GEN_HANDLER_E(name, 0x3F, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \
+GEN_HANDLER_E(name, 0x3F, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP)
+
+#define _GEN_DFP_QUADx4(name, op1, op2, mask) \
+GEN_HANDLER_E(name, 0x3F, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \
+GEN_HANDLER_E(name, 0x3F, op1, 0x08 | op2, mask, PPC_NONE, PPC2_DFP), \
+GEN_HANDLER_E(name, 0x3F, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP), \
+GEN_HANDLER_E(name, 0x3F, op1, 0x18 | op2, mask, PPC_NONE, PPC2_DFP)
+
+#define GEN_DFP_T_A_B_Rc(name, op1, op2) \
+_GEN_DFP_LONG(name, op1, op2, 0x00000000)
+
+#define GEN_DFP_Tp_Ap_Bp_Rc(name, op1, op2) \
+_GEN_DFP_QUAD(name, op1, op2, 0x00210800)
+
+#define GEN_DFP_Tp_A_Bp_Rc(name, op1, op2) \
+_GEN_DFP_QUAD(name, op1, op2, 0x00200800)
+
+#define GEN_DFP_T_B_Rc(name, op1, op2) \
+_GEN_DFP_LONG(name, op1, op2, 0x001F0000)
+
+#define GEN_DFP_Tp_Bp_Rc(name, op1, op2) \
+_GEN_DFP_QUAD(name, op1, op2, 0x003F0800)
+
+#define GEN_DFP_Tp_B_Rc(name, op1, op2) \
+_GEN_DFP_QUAD(name, op1, op2, 0x003F0000)
+
+#define GEN_DFP_T_Bp_Rc(name, op1, op2) \
+_GEN_DFP_QUAD(name, op1, op2, 0x001F0800)
+
+#define GEN_DFP_BF_A_B(name, op1, op2) \
+_GEN_DFP_LONG(name, op1, op2, 0x00000001)
+
+#define GEN_DFP_BF_Ap_Bp(name, op1, op2) \
+_GEN_DFP_QUAD(name, op1, op2, 0x00610801)
+
+#define GEN_DFP_BF_A_Bp(name, op1, op2) \
+_GEN_DFP_QUAD(name, op1, op2, 0x00600801)
+
+#define GEN_DFP_BF_A_DCM(name, op1, op2) \
+_GEN_DFP_LONGx2(name, op1, op2, 0x00600001)
+
+#define GEN_DFP_BF_Ap_DCM(name, op1, op2) \
+_GEN_DFP_QUADx2(name, op1, op2, 0x00610001)
+
+#define GEN_DFP_T_A_B_RMC_Rc(name, op1, op2) \
+_GEN_DFP_LONGx4(name, op1, op2, 0x00000000)
+
+#define GEN_DFP_Tp_Ap_Bp_RMC_Rc(name, op1, op2) \
+_GEN_DFP_QUADx4(name, op1, op2, 0x02010800)
+
+#define GEN_DFP_Tp_A_Bp_RMC_Rc(name, op1, op2) \
+_GEN_DFP_QUADx4(name, op1, op2, 0x02000800)
+
+#define GEN_DFP_TE_T_B_RMC_Rc(name, op1, op2) \
+_GEN_DFP_LONGx4(name, op1, op2, 0x00000000)
+
+#define GEN_DFP_TE_Tp_Bp_RMC_Rc(name, op1, op2) \
+_GEN_DFP_QUADx4(name, op1, op2, 0x00200800)
+
+#define GEN_DFP_R_T_B_RMC_Rc(name, op1, op2) \
+_GEN_DFP_LONGx4(name, op1, op2, 0x001E0000)
+
+#define GEN_DFP_R_Tp_Bp_RMC_Rc(name, op1, op2) \
+_GEN_DFP_QUADx4(name, op1, op2, 0x003E0800)
+
+#define GEN_DFP_SP_T_B_Rc(name, op1, op2) \
+_GEN_DFP_LONG(name, op1, op2, 0x00070000)
+
+#define GEN_DFP_SP_Tp_Bp_Rc(name, op1, op2) \
+_GEN_DFP_QUAD(name, op1, op2, 0x00270800)
+
+#define GEN_DFP_S_T_B_Rc(name, op1, op2) \
+_GEN_DFP_LONG(name, op1, op2, 0x000F0000)
+
+#define GEN_DFP_S_Tp_Bp_Rc(name, op1, op2) \
+_GEN_DFP_QUAD(name, op1, op2, 0x002F0800)
+
+#define GEN_DFP_T_A_SH_Rc(name, op1, op2) \
+_GEN_DFP_LONGx2(name, op1, op2, 0x00000000)
+
+#define GEN_DFP_Tp_Ap_SH_Rc(name, op1, op2) \
+_GEN_DFP_QUADx2(name, op1, op2, 0x00210000)
+
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type,
PPC_NONE)
--
1.8.1.4
- [Qemu-devel] [PULL 020/118] libdecnumber: Eliminate redundant declarations, (continued)
- [Qemu-devel] [PULL 020/118] libdecnumber: Eliminate redundant declarations, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 027/118] target-ppc: Introduce Generator Macros for DFP Arithmetic Forms, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 026/118] target-ppc: Define FPR Pointer Type for Helpers, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 023/118] libdecnumber: Introduce decNumberFrom[U]Int64, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 024/118] libdecnumber: Introduce decNumberIntegralToInt64, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 016/118] libdecnumber: Eliminate #include *Symbols.h, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 037/118] target-ppc: Introduce DFP Test Data Group, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 032/118] target-ppc: Introduce DFP Subtract, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 018/118] libdecnumber: Modify dconfig.h to Integrate with QEMU, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 031/118] target-ppc: Introduce DFP Add, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 028/118] target-ppc: Introduce Decoder Macros for DFP,
Alexander Graf <=
- [Qemu-devel] [PULL 035/118] target-ppc: Introduce DFP Compares, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 038/118] target-ppc: Introduce DFP Test Exponent, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 039/118] target-ppc: Introduce DFP Test Significance, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 045/118] target-ppc: Introduce DFP Convert to Fixed, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 043/118] target-ppc: Introduce DFP Convert to Long/Extended, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 036/118] target-ppc: Introduce DFP Test Data Class, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 040/118] target-ppc: Introduce DFP Quantize, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 042/118] target-ppc: Introduce DFP Round to Integer, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 041/118] target-ppc: Introduce DFP Reround, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 034/118] target-ppc: Introduce DFP Divide, Alexander Graf, 2014/06/04