[Qemu-devel] [PULL 045/118] target-ppc: Introduce DFP Convert to Fixed

[Alexander Graf]

From: Tom Musta <address@hidden>

Add emulation of the PowerPC Decimal Floating Point Convert to
Fixed instructions dctfix[q][.].

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
 target-ppc/dfp_helper.c | 26 ++++++++++++++++++++++++++
 target-ppc/helper.h     |  2 ++
 target-ppc/translate.c  |  4 ++++
 3 files changed, 32 insertions(+)

diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
index 548949f..41f87e0 100644
--- a/target-ppc/dfp_helper.c
+++ b/target-ppc/dfp_helper.c
@@ -921,3 +921,29 @@ void helper_drdpq(CPUPPCState *env, uint64_t *t, uint64_t 
*b)
     t[0] = dfp.t64[0];
     t[1] = 0;
 }
+
+#define DFP_HELPER_CFFIX(op, size)                                             
\
+void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *b)                   
\
+{                                                                              
\
+    struct PPC_DFP dfp;                                                        
\
+    dfp_prepare_decimal##size(&dfp, 0, b, env);                                
\
+    decNumberFromInt64(&dfp.t, (int64_t)(*b));                                 
\
+    decimal##size##FromNumber((decimal##size *)dfp.t64, &dfp.t, &dfp.context); 
\
+    CFFIX_PPs(&dfp);                                                           
\
+                                                                               
\
+    if (size == 64) {                                                          
\
+        t[0] = dfp.t64[0];                                                     
\
+    } else if (size == 128) {                                                  
\
+        t[0] = dfp.t64[HI_IDX];                                                
\
+        t[1] = dfp.t64[LO_IDX];                                                
\
+    }                                                                          
\
+}
+
+static void CFFIX_PPs(struct PPC_DFP *dfp)
+{
+    dfp_set_FPRF_from_FRT(dfp);
+    dfp_check_for_XX(dfp);
+}
+
+DFP_HELPER_CFFIX(dcffix, 64)
+DFP_HELPER_CFFIX(dcffixq, 128)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 2220e62..bc7b2d2 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -650,3 +650,5 @@ DEF_HELPER_3(dctdp, void, env, fprp, fprp)
 DEF_HELPER_3(dctqpq, void, env, fprp, fprp)
 DEF_HELPER_3(drsp, void, env, fprp, fprp)
 DEF_HELPER_3(drdpq, void, env, fprp, fprp)
+DEF_HELPER_3(dcffix, void, env, fprp, fprp)
+DEF_HELPER_3(dcffixq, void, env, fprp, fprp)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index f93536a..f4ef9a8 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -8389,6 +8389,8 @@ GEN_DFP_T_B_Rc(dctdp)
 GEN_DFP_T_B_Rc(dctqpq)
 GEN_DFP_T_B_Rc(drsp)
 GEN_DFP_T_B_Rc(drdpq)
+GEN_DFP_T_B_Rc(dcffix)
+GEN_DFP_T_B_Rc(dcffixq)
 /***                           SPE extension                               ***/
 /* Register moves */
 
@@ -11350,6 +11352,8 @@ GEN_DFP_T_B_Rc(dctdp, 0x02, 0x08),
 GEN_DFP_Tp_B_Rc(dctqpq, 0x02, 0x08),
 GEN_DFP_T_B_Rc(drsp, 0x02, 0x18),
 GEN_DFP_Tp_Bp_Rc(drdpq, 0x02, 0x18),
+GEN_DFP_T_B_Rc(dcffix, 0x02, 0x19),
+GEN_DFP_Tp_B_Rc(dcffixq, 0x02, 0x19),
 #undef GEN_SPE
 #define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
     GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, 
PPC_NONE)
-- 
1.8.1.4