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[Qemu-devel] [PULL 047/118] target-ppc: Introduce DFP Decode DPD to BCD
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 047/118] target-ppc: Introduce DFP Decode DPD to BCD |
Date: |
Wed, 4 Jun 2014 14:43:48 +0200 |
From: Tom Musta <address@hidden>
Add emulation of the Power PC Decimal Floating Point Decode
Densely Packed Decimal to Binary Coded Decimal instructions
ddedpd[q][.].
Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/dfp_helper.c | 66 +++++++++++++++++++++++++++++++++++++++++++++++++
target-ppc/helper.h | 2 ++
target-ppc/translate.c | 4 +++
3 files changed, 72 insertions(+)
diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
index 24de5a7..df40da7 100644
--- a/target-ppc/dfp_helper.c
+++ b/target-ppc/dfp_helper.c
@@ -983,3 +983,69 @@ void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t
*b) \
DFP_HELPER_CTFIX(dctfix, 64)
DFP_HELPER_CTFIX(dctfixq, 128)
+
+static inline void dfp_set_bcd_digit_64(uint64_t *t, uint8_t digit,
+ unsigned n)
+{
+ *t |= ((uint64_t)(digit & 0xF) << (n << 2));
+}
+
+static inline void dfp_set_bcd_digit_128(uint64_t *t, uint8_t digit,
+ unsigned n)
+{
+ t[(n & 0x10) ? HI_IDX : LO_IDX] |=
+ ((uint64_t)(digit & 0xF) << ((n & 15) << 2));
+}
+
+static inline void dfp_set_sign_64(uint64_t *t, uint8_t sgn)
+{
+ *t <<= 4;
+ *t |= (sgn & 0xF);
+}
+
+static inline void dfp_set_sign_128(uint64_t *t, uint8_t sgn)
+{
+ t[HI_IDX] <<= 4;
+ t[HI_IDX] |= (t[LO_IDX] >> 60);
+ t[LO_IDX] <<= 4;
+ t[LO_IDX] |= (sgn & 0xF);
+}
+
+#define DFP_HELPER_DEDPD(op, size) \
+void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *b, uint32_t sp) \
+{ \
+ struct PPC_DFP dfp; \
+ uint8_t digits[34]; \
+ int i, N; \
+ \
+ dfp_prepare_decimal##size(&dfp, 0, b, env); \
+ \
+ decNumberGetBCD(&dfp.b, digits); \
+ dfp.t64[0] = dfp.t64[1] = 0; \
+ N = dfp.b.digits; \
+ \
+ for (i = 0; (i < N) && (i < (size)/4); i++) { \
+ dfp_set_bcd_digit_##size(dfp.t64, digits[N-i-1], i); \
+ } \
+ \
+ if (sp & 2) { \
+ uint8_t sgn; \
+ \
+ if (decNumberIsNegative(&dfp.b)) { \
+ sgn = 0xD; \
+ } else { \
+ sgn = ((sp & 1) ? 0xF : 0xC); \
+ } \
+ dfp_set_sign_##size(dfp.t64, sgn); \
+ } \
+ \
+ if (size == 64) { \
+ t[0] = dfp.t64[0]; \
+ } else if (size == 128) { \
+ t[0] = dfp.t64[HI_IDX]; \
+ t[1] = dfp.t64[LO_IDX]; \
+ } \
+}
+
+DFP_HELPER_DEDPD(ddedpd, 64)
+DFP_HELPER_DEDPD(ddedpdq, 128)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 69c0a1d..d4e73f2 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -654,3 +654,5 @@ DEF_HELPER_3(dcffix, void, env, fprp, fprp)
DEF_HELPER_3(dcffixq, void, env, fprp, fprp)
DEF_HELPER_3(dctfix, void, env, fprp, fprp)
DEF_HELPER_3(dctfixq, void, env, fprp, fprp)
+DEF_HELPER_4(ddedpd, void, env, fprp, fprp, i32)
+DEF_HELPER_4(ddedpdq, void, env, fprp, fprp, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index cc7af45..0de657a 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -8393,6 +8393,8 @@ GEN_DFP_T_B_Rc(dcffix)
GEN_DFP_T_B_Rc(dcffixq)
GEN_DFP_T_B_Rc(dctfix)
GEN_DFP_T_B_Rc(dctfixq)
+GEN_DFP_T_FPR_I32_Rc(ddedpd, rB, SP)
+GEN_DFP_T_FPR_I32_Rc(ddedpdq, rB, SP)
/*** SPE extension ***/
/* Register moves */
@@ -11358,6 +11360,8 @@ GEN_DFP_T_B_Rc(dcffix, 0x02, 0x19),
GEN_DFP_Tp_B_Rc(dcffixq, 0x02, 0x19),
GEN_DFP_T_B_Rc(dctfix, 0x02, 0x09),
GEN_DFP_T_Bp_Rc(dctfixq, 0x02, 0x09),
+GEN_DFP_SP_T_B_Rc(ddedpd, 0x02, 0x0a),
+GEN_DFP_SP_Tp_Bp_Rc(ddedpdq, 0x02, 0x0a),
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type,
PPC_NONE)
--
1.8.1.4
- [Qemu-devel] [PULL 045/118] target-ppc: Introduce DFP Convert to Fixed, (continued)
- [Qemu-devel] [PULL 045/118] target-ppc: Introduce DFP Convert to Fixed, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 043/118] target-ppc: Introduce DFP Convert to Long/Extended, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 036/118] target-ppc: Introduce DFP Test Data Class, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 040/118] target-ppc: Introduce DFP Quantize, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 042/118] target-ppc: Introduce DFP Round to Integer, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 041/118] target-ppc: Introduce DFP Reround, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 034/118] target-ppc: Introduce DFP Divide, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 044/118] target-ppc: Introduce Round to DFP Short/Long, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 046/118] target-ppc: Introduce DFP Convert to Fixed, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 054/118] util: Add AES ShiftRows and InvShiftRows Tables, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 047/118] target-ppc: Introduce DFP Decode DPD to BCD,
Alexander Graf <=
- [Qemu-devel] [PULL 048/118] target-ppc: Introduce DFP Encode BCD to DPD, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 050/118] target-ppc: Introduce DFP Insert Biased Exponent, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 052/118] spapr_pci: fix MSI limit, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 053/118] util: Add S-Box and InvS-Box Arrays to Common AES Utils, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 059/118] KVM: PPC: Don't secretly add 1T segment feature to CPU, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 049/118] target-ppc: Introduce DFP Extract Biased Exponent, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 062/118] PPC: Fix TCG chunks that don't free their temps, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 057/118] target-arm: Use Common Tables in AES Instructions, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 056/118] target-i386: Use Common ShiftRows and InvShiftRows Tables, Alexander Graf, 2014/06/04
- [Qemu-devel] [PULL 063/118] PPC: Fail on leaking temporaries, Alexander Graf, 2014/06/04