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[Qemu-devel] [PULL 19/33] target-i386: commonize checks for 2MB and 4KB
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 19/33] target-i386: commonize checks for 2MB and 4KB pages |
Date: |
Thu, 5 Jun 2014 16:22:09 +0200 |
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-i386/helper.c | 127 ++++++++++++++++++---------------------------------
1 file changed, 44 insertions(+), 83 deletions(-)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 7b3819b..cf18336 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -634,50 +634,8 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
if (pde & PG_PSE_MASK) {
/* 2 MB page */
page_size = 2048 * 1024;
- ptep ^= PG_NX_MASK;
- if ((ptep & PG_NX_MASK) && is_write1 == 2) {
- goto do_fault_protect;
- }
- switch (mmu_idx) {
- case MMU_USER_IDX:
- if (!(ptep & PG_USER_MASK)) {
- goto do_fault_protect;
- }
- if (is_write && !(ptep & PG_RW_MASK)) {
- goto do_fault_protect;
- }
- break;
-
- case MMU_KSMAP_IDX:
- if (is_write1 != 2 && (ptep & PG_USER_MASK)) {
- goto do_fault_protect;
- }
- /* fall through */
- case MMU_KNOSMAP_IDX:
- if (is_write1 == 2 && (env->cr[4] & CR4_SMEP_MASK) &&
- (ptep & PG_USER_MASK)) {
- goto do_fault_protect;
- }
- if ((env->cr[0] & CR0_WP_MASK) &&
- is_write && !(ptep & PG_RW_MASK)) {
- goto do_fault_protect;
- }
- break;
-
- default: /* cannot happen */
- break;
- }
- is_dirty = is_write && !(pde & PG_DIRTY_MASK);
- if (!(pde & PG_ACCESSED_MASK) || is_dirty) {
- pde |= PG_ACCESSED_MASK;
- if (is_dirty) {
- pde |= PG_DIRTY_MASK;
- }
- stl_phys_notdirty(cs->as, pde_addr, pde);
- }
- /* align to page_size */
- pte = pde & ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff);
- virt_addr = addr & ~(page_size - 1);
+ pte_addr = pde_addr;
+ pte = pde;
} else {
/* 4 KB page */
if (!(pde & PG_ACCESSED_MASK)) {
@@ -697,50 +655,53 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
}
/* combine pde and pte nx, user and rw protections */
ptep &= pte ^ PG_NX_MASK;
- ptep ^= PG_NX_MASK;
- if ((ptep & PG_NX_MASK) && is_write1 == 2)
- goto do_fault_protect;
- switch (mmu_idx) {
- case MMU_USER_IDX:
- if (!(ptep & PG_USER_MASK)) {
- goto do_fault_protect;
- }
- if (is_write && !(ptep & PG_RW_MASK)) {
- goto do_fault_protect;
- }
- break;
+ page_size = 4096;
+ }
- case MMU_KSMAP_IDX:
- if (is_write1 != 2 && (ptep & PG_USER_MASK)) {
- goto do_fault_protect;
- }
- /* fall through */
- case MMU_KNOSMAP_IDX:
- if (is_write1 == 2 && (env->cr[4] & CR4_SMEP_MASK) &&
- (ptep & PG_USER_MASK)) {
- goto do_fault_protect;
- }
- if ((env->cr[0] & CR0_WP_MASK) &&
- is_write && !(ptep & PG_RW_MASK)) {
- goto do_fault_protect;
- }
- break;
+ ptep ^= PG_NX_MASK;
+ if ((ptep & PG_NX_MASK) && is_write1 == 2) {
+ goto do_fault_protect;
+ }
+ switch (mmu_idx) {
+ case MMU_USER_IDX:
+ if (!(ptep & PG_USER_MASK)) {
+ goto do_fault_protect;
+ }
+ if (is_write && !(ptep & PG_RW_MASK)) {
+ goto do_fault_protect;
+ }
+ break;
- default: /* cannot happen */
- break;
+ case MMU_KSMAP_IDX:
+ if (is_write1 != 2 && (ptep & PG_USER_MASK)) {
+ goto do_fault_protect;
}
- is_dirty = is_write && !(pte & PG_DIRTY_MASK);
- if (!(pte & PG_ACCESSED_MASK) || is_dirty) {
- pte |= PG_ACCESSED_MASK;
- if (is_dirty) {
- pte |= PG_DIRTY_MASK;
- }
- stl_phys_notdirty(cs->as, pte_addr, pte);
+ /* fall through */
+ case MMU_KNOSMAP_IDX:
+ if (is_write1 == 2 && (env->cr[4] & CR4_SMEP_MASK) &&
+ (ptep & PG_USER_MASK)) {
+ goto do_fault_protect;
}
- page_size = 4096;
- virt_addr = addr & ~0xfff;
- pte = pte & (PHYS_ADDR_MASK | 0xfff);
+ if ((env->cr[0] & CR0_WP_MASK) &&
+ is_write && !(ptep & PG_RW_MASK)) {
+ goto do_fault_protect;
+ }
+ break;
+
+ default: /* cannot happen */
+ break;
+ }
+ is_dirty = is_write && !(pte & PG_DIRTY_MASK);
+ if (!(pte & PG_ACCESSED_MASK) || is_dirty) {
+ pte |= PG_ACCESSED_MASK;
+ if (is_dirty) {
+ pte |= PG_DIRTY_MASK;
+ }
+ stl_phys_notdirty(cs->as, pte_addr, pte);
}
+ /* align to page_size */
+ pte &= ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff);
+ virt_addr = addr & ~(page_size - 1);
} else {
uint32_t pde;
--
1.8.3.1
- [Qemu-devel] [PULL 12/33] softmmu: introduce cpu_ldst.h, (continued)
- [Qemu-devel] [PULL 12/33] softmmu: introduce cpu_ldst.h, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 10/33] softmmu: move softmmu_template.h out of include/, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 11/33] target-arm: move arm_*_code to a separate file, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 13/33] softmmu: move all load/store functions to cpu_ldst.h, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 16/33] target-i386: fix kernel accesses with SMAP and CPL = 3, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 15/33] target-i386: move check_io helpers to seg_helper.c, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 17/33] target-i386: simplify SMAP handling in MMU_KSMAP_IDX, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 14/33] target-i386: rename KSMAP to KNOSMAP, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 18/33] target-i386: fix coding standards in x86_cpu_handle_mmu_fault, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 20/33] target-i386: commonize checks for 4MB and 4KB pages, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 19/33] target-i386: commonize checks for 2MB and 4KB pages,
Paolo Bonzini <=
- [Qemu-devel] [PULL 21/33] target-i386: commonize checks for PAE and non-PAE, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 23/33] target-i386: introduce do_check_protect label, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 22/33] target-i386: tweak handling of PG_NX_MASK, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 24/33] target-i386: introduce support for 1 GB pages, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 26/33] target-i386: test reserved PS bit on PML4Es, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 25/33] target-i386: set correct error code for reserved bit access, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 27/33] target-i386: raise page fault for reserved physical address bits, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 28/33] target-i386: simplify pte/vaddr calculation, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 29/33] target-i386: unify reserved bits and NX bit check, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 31/33] target-i386: support long addresses for 4MB pages (PSE-36), Paolo Bonzini, 2014/06/05