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[Qemu-devel] [PATCH 02/12] target-mips: update cpu_save/cpu_load to supp
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PATCH 02/12] target-mips: update cpu_save/cpu_load to support KScratch registers |
Date: |
Thu, 19 Jun 2014 15:45:33 +0100 |
Signed-off-by: Leon Alrae <address@hidden>
---
target-mips/machine.c | 8 ++++++++
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/target-mips/machine.c b/target-mips/machine.c
index 0496faa..966c5ef 100644
--- a/target-mips/machine.c
+++ b/target-mips/machine.c
@@ -144,6 +144,9 @@ void cpu_save(QEMUFile *f, void *opaque)
qemu_put_sbe32s(f, &env->CP0_DataHi);
qemu_put_betls(f, &env->CP0_ErrorEPC);
qemu_put_sbe32s(f, &env->CP0_DESAVE);
+ for (i = 0; i < MIPS_KSCRATCH_NUM; i++) {
+ qemu_put_betls(f, &env->CP0_KScratch[i]);
+ }
/* Save inactive TC state */
for (i = 0; i < MIPS_SHADOW_SET_MAX; i++)
@@ -301,6 +304,11 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
qemu_get_sbe32s(f, &env->CP0_DataHi);
qemu_get_betls(f, &env->CP0_ErrorEPC);
qemu_get_sbe32s(f, &env->CP0_DESAVE);
+ if (version_id >= 4) {
+ for (i = 0; i < MIPS_KSCRATCH_NUM; i++) {
+ qemu_get_betls(f, &env->CP0_KScratch[i]);
+ }
+ }
/* Load inactive TC state */
for (i = 0; i < MIPS_SHADOW_SET_MAX; i++) {
--
1.7.5.4
- [Qemu-devel] [PATCH 00/12] implement features required in MIPS64 Release 6, Leon Alrae, 2014/06/19
- [Qemu-devel] [PATCH 01/12] target-mips: add KScratch registers, Leon Alrae, 2014/06/19
- [Qemu-devel] [PATCH 02/12] target-mips: update cpu_save/cpu_load to support KScratch registers,
Leon Alrae <=
- [Qemu-devel] [PATCH 03/12] target-mips: distinguish between data load and instruction fetch, Leon Alrae, 2014/06/19
- [Qemu-devel] [PATCH 04/12] target-mips: add RI and XI fields to TLB entry, Leon Alrae, 2014/06/19
- [Qemu-devel] [PATCH 05/12] target-mips: update PageGrain and m{t, f}c0 EntryLo{0, 1}, Leon Alrae, 2014/06/19
- [Qemu-devel] [PATCH 08/12] target-mips: add BadInstr and BadInstrP support, Leon Alrae, 2014/06/19
- [Qemu-devel] [PATCH 07/12] target-mips: add TLBINV support, Leon Alrae, 2014/06/19
- [Qemu-devel] [PATCH 06/12] target-mips: add new Read-Inhibit and Execute-Inhibit exceptions, Leon Alrae, 2014/06/19
- [Qemu-devel] [PATCH 09/12] target-mips: save cpu state if instruction can cause an exception, Leon Alrae, 2014/06/19