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[Qemu-devel] [PULL 04/14] target-arm/translate-a64.c: Remove dead ?: in
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 04/14] target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int() |
Date: |
Thu, 19 Jun 2014 18:36:47 +0100 |
In disas_simd_3same_int(), none of the instructions permit is_q
to be false with size == 3 (this would be a vector operation with
a one-element vector, and the instruction set encodes those as
scalar operations). Replace the always-true ?: check with an
assert.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
---
target-arm/translate-a64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 63ad787..cbc8a35 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -9052,7 +9052,8 @@ static void disas_simd_3same_int(DisasContext *s,
uint32_t insn)
}
if (size == 3) {
- for (pass = 0; pass < (is_q ? 2 : 1); pass++) {
+ assert(is_q);
+ for (pass = 0; pass < 2; pass++) {
TCGv_i64 tcg_op1 = tcg_temp_new_i64();
TCGv_i64 tcg_op2 = tcg_temp_new_i64();
TCGv_i64 tcg_res = tcg_temp_new_i64();
--
1.9.2
- [Qemu-devel] [PULL 00/14] target-arm queue, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 14/14] armv7m_nvic: fix AIRCR implementation, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 11/14] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 12/14] target-arm: Introduce per-CPU field for PSCI version, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 09/14] target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 08/14] kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 06/14] hw/arm/vexpress: Forbid specifying flash contents in two ways at once, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 04/14] target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int(),
Peter Maydell <=
- [Qemu-devel] [PULL 07/14] hw/block/pflash_cfi01: Report correct size info for parallel configs, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 03/14] target-arm: Add ULL suffix to calculation of page size, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 10/14] target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 02/14] hw/arm/spitz: Avoid clash with Windows header symbol MOD_SHIFT, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 01/14] target-arm: implement PD0/PD1 bits for TTBCR, Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 05/14] target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv(), Peter Maydell, 2014/06/19
- [Qemu-devel] [PULL 13/14] Use PSCI v0.2 compatible string when KVM or TCG provides it, Peter Maydell, 2014/06/19
- Re: [Qemu-devel] [PULL 00/14] target-arm queue, Peter Maydell, 2014/06/20