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[Qemu-devel] [PATCH v3 12/25] tcg-ppc64: Adjust tcg_out_call for ELFv2
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v3 12/25] tcg-ppc64: Adjust tcg_out_call for ELFv2 |
Date: |
Fri, 20 Jun 2014 07:13:28 -0700 |
From: Ulrich Weigand <address@hidden>
The new ELFv2 ABI, used by default on powerpc64le-linux hosts,
introduced some changes that are incompatible with code currently
generated by the ppc64 TGC target. In particular, we no longer
use function descriptors.
This patch adds support for the ELFv2 ABI in the ppc64 TGC
function call and function prologue sequences.
Signed-off-by: Ulrich Weigand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ppc64/tcg-target.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index d3cc237..635ff98 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -1115,6 +1115,23 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit
*target)
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_REG_R2, ofs + SZP);
tcg_out32(s, BCCTR | BO_ALWAYS | LK);
}
+#elif defined(_CALL_ELF) && _CALL_ELF == 2
+ intptr_t diff;
+
+ /* In the ELFv2 ABI, we have to set up r12 to contain the destination
+ address, which the callee uses to compute its TOC address. */
+ /* FIXME: when the branch is in range, we could avoid r12 load if we
+ knew that the destination uses the same TOC, and what its local
+ entry point offset is. */
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R12, (intptr_t)target);
+
+ diff = tcg_pcrel_diff(s, target);
+ if (in_range_b(diff)) {
+ tcg_out_b(s, LK, target);
+ } else {
+ tcg_out32(s, MTSPR | RS(TCG_REG_R12) | CTR);
+ tcg_out32(s, BCCTR | BO_ALWAYS | LK);
+ }
#else
tcg_out_b(s, LK, target);
#endif
--
1.9.3
- [Qemu-devel] [PATCH v3 02/25] tcg-ppc64: Avoid some hard-codings of TCG_TYPE_I64, (continued)
- [Qemu-devel] [PATCH v3 02/25] tcg-ppc64: Avoid some hard-codings of TCG_TYPE_I64, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 03/25] tcg-ppc64: Move functions around, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 04/25] tcg-ppc64: Relax register restrictions in tcg_out_mem_long, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 05/25] tcg-ppc64: Use tcg_out_{ld, st, cmp} internally, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 06/25] tcg-ppc64: Make TCG_AREG0 and TCG_REG_CALL_STACK enum constants, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 07/25] tcg-ppc64: Move call macros out of tcg-target.h, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 08/25] tcg-ppc64: Fix TCG_TARGET_CALL_STACK_OFFSET, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 09/25] tcg-ppc64: Better parameterize the stack frame, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 10/25] tcg-ppc64: Use the correct test in tcg_out_call, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 11/25] tcg-ppc64: Support the ppc64 elfv2 ABI, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 12/25] tcg-ppc64: Adjust tcg_out_call for ELFv2,
Richard Henderson <=
- [Qemu-devel] [PATCH v3 13/25] tcg-ppc64: Merge 32-bit ABIs into the prologue / frame code, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 14/25] tcg-ppc64: Fix sub2 implementation, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 15/25] tcg-ppc64: Begin merging ppc32 with ppc64, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 16/25] tcg-ppc64: Merge ppc32 brcond2, setcond2, muluh, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 17/25] tcg-ppc64: Merge ppc32 qemu_ld/st, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 18/25] tcg-ppc64: Merge ppc32 register usage, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 19/25] tcg-ppc64: Support mulsh_i32, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 20/25] tcg-ppc64: Merge ppc32 shifts, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 21/25] tcg-ppc: Remove the backend, Richard Henderson, 2014/06/20
- [Qemu-devel] [PATCH v3 22/25] tcg-ppc: Rename the tcg/ppc64 backend, Richard Henderson, 2014/06/20