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[Qemu-devel] [PATCH v3 09/11] target-arm: implement setend
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH v3 09/11] target-arm: implement setend |
Date: |
Sat, 21 Jun 2014 14:58:20 +0200 |
Since this is not a high-performance path, just use a helper to
flip the E bit and force a lookup in the hash table since the
flags have changed.
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-arm/helper.h | 1 +
target-arm/op_helper.c | 5 +++++
target-arm/translate.c | 12 ++++++------
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/target-arm/helper.h b/target-arm/helper.h
index facfcd2..c7e3949 100644
--- a/target-arm/helper.h
+++ b/target-arm/helper.h
@@ -48,6 +48,7 @@ DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE,
i32, i32, i32, i32)
DEF_HELPER_2(exception_internal, void, env, i32)
DEF_HELPER_3(exception_with_syndrome, void, env, i32, i32)
+DEF_HELPER_1(setend, void, env)
DEF_HELPER_1(wfi, void, env)
DEF_HELPER_1(wfe, void, env)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 9c1ef52..30eea14 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -209,6 +209,11 @@ uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x,
uint32_t shift)
return res;
}
+void HELPER(setend)(CPUARMState *env)
+{
+ env->uncached_cpsr ^= CPSR_E;
+}
+
void HELPER(wfi)(CPUARMState *env)
{
CPUState *cs = CPU(arm_env_get_cpu(env));
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 8be8f21..30e3586 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7561,9 +7561,9 @@ static void disas_arm_insn(CPUARMState * env,
DisasContext *s)
ARCH(6);
/* setend */
if (((insn >> 9) & 1) != s->cpsr_e) {
- /* Dynamic endianness switching not implemented. */
- qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
- goto illegal_op;
+ gen_helper_setend(cpu_env);
+ gen_set_pc_im(s, s->pc);
+ s->is_jmp = DISAS_JUMP;
}
return;
} else if ((insn & 0x0fffff00) == 0x057ff000) {
@@ -10728,9 +10728,9 @@ static void disas_thumb_insn(CPUARMState *env,
DisasContext *s)
/* setend */
ARCH(6);
if (((insn >> 3) & 1) != s->cpsr_e) {
- /* Dynamic endianness switching not implemented. */
- qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
- goto illegal_op;
+ gen_helper_setend(cpu_env);
+ gen_set_pc_im(s, s->pc);
+ s->is_jmp = DISAS_JUMP;
}
break;
case 3:
--
1.9.3
- Re: [Qemu-devel] [PATCH v3 04/11] linux-user: arm: set CPSR.E correctly for BE8 mode, (continued)
- [Qemu-devel] [PATCH v3 06/11] target-arm: implement SCTLR.EE, Paolo Bonzini, 2014/06/21
- [Qemu-devel] [PATCH v3 05/11] linux-user: arm: handle CPSR.E correctly in strex emulation, Paolo Bonzini, 2014/06/21
- [Qemu-devel] [PATCH v3 07/11] target-arm: pass DisasContext to gen_aa32_ld*/st*, Paolo Bonzini, 2014/06/21
- [Qemu-devel] [PATCH v3 08/11] target-arm: introduce tbflag for CPSR.E, Paolo Bonzini, 2014/06/21
- [Qemu-devel] [PATCH v3 09/11] target-arm: implement setend,
Paolo Bonzini <=
- [Qemu-devel] [PATCH v3 10/11] target-arm: reorganize gen_aa32_ld/st to prepare for BE32 system emulation, Paolo Bonzini, 2014/06/21
- [Qemu-devel] [PATCH v3 11/11] target-arm: implement BE32 mode in system emulation, Paolo Bonzini, 2014/06/21