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[Qemu-devel] [PATCH 11/13] target-s390x: implement miscellaneous-instruc
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH 11/13] target-s390x: implement miscellaneous-instruction-extensions facility |
Date: |
Mon, 1 Jun 2015 23:24:55 +0200 |
RISBGN is the same as RISBG, but without setting the condition code.
CLT and CLGT are the same as CLRT and CLGRT, but using memory for the
second operand.
Cc: Alexander Graf <address@hidden>
Cc: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
target-s390x/insn-data.def | 3 +++
target-s390x/translate.c | 1 +
2 files changed, 4 insertions(+)
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 85be2a0..b0ee9bc 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -230,6 +230,8 @@
/* COMPARE LOGICAL AND TRAP */
D(0xb973, CLRT, RRF_c, GIE, r1_32u, r2_32u, 0, 0, ct, 0, 1)
D(0xb961, CLGRT, RRF_c, GIE, r1_o, r2_o, 0, 0, ct, 0, 1)
+ D(0xeb23, CLT, RSY_b, MIE, r1_32u, m2_32u, 0, 0, ct, 0, 1)
+ D(0xeb2b, CLGT, RSY_b, MIE, r1_o, m2_64, 0, 0, ct, 0, 1)
D(0xec73, CLFIT, RIE_a, GIE, r1_32u, i2_32u, 0, 0, ct, 0, 1)
D(0xec71, CLGIT, RIE_a, GIE, r1_o, i2_32u, 0, 0, ct, 0, 1)
@@ -604,6 +606,7 @@
/* ROTATE THEN INSERT SELECTED BITS */
C(0xec55, RISBG, RIE_f, GIE, 0, r2, r1, 0, risbg, s64)
+ C(0xec59, RISBGN, RIE_f, MIE, 0, r2, r1, 0, risbg, 0)
C(0xec5d, RISBHG, RIE_f, HW, 0, r2, r1, 0, risbg, 0)
C(0xec51, RISBLG, RIE_f, HW, 0, r2, r1, 0, risbg, 0)
/* ROTATE_THEN <OP> SELECTED BITS */
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index db29993..b792dae 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -1119,6 +1119,7 @@ typedef enum DisasFacility {
FAC_HFP_MA, /* HFP multiply-and-add/subtract */
FAC_HW, /* high-word */
FAC_IEEEE_SIM, /* IEEE exception sumilation */
+ FAC_MIE, /* miscellaneous-instruction-extensions */
FAC_LOC, /* load/store on condition */
FAC_LD, /* long displacement */
FAC_PC, /* population count */
--
2.1.4
- Re: [Qemu-devel] [PATCH 05/13] target-s390x: move STORE CLOCK FAST to the correct facility, (continued)
- [Qemu-devel] [PATCH 04/13] target-s390x: change CHRL and CGHRL format to RIL-b, Aurelien Jarno, 2015/06/01
- [Qemu-devel] [PATCH 08/13] target-s390x: implement TRANSLATE AND TEST instruction, Aurelien Jarno, 2015/06/01
- [Qemu-devel] [PATCH 01/13] target-s390x: fix exception for invalid operation code, Aurelien Jarno, 2015/06/01
- [Qemu-devel] [PATCH 07/13] target-s390x: implement LOAD FP INTEGER instructions, Aurelien Jarno, 2015/06/01
- [Qemu-devel] [PATCH 11/13] target-s390x: implement miscellaneous-instruction-extensions facility,
Aurelien Jarno <=
- [Qemu-devel] [PATCH 10/13] target-s390x: implement LPDFR and LNDFR instructions, Aurelien Jarno, 2015/06/01
- [Qemu-devel] [PATCH 13/13] target-s390x: implement high-word facility, Aurelien Jarno, 2015/06/01
- [Qemu-devel] [PATCH 12/13] target-s390x: implement load-and-trap facility, Aurelien Jarno, 2015/06/01